Patents by Inventor Makoto Shibuya

Makoto Shibuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240151460
    Abstract: A refrigerator comprising a cabinet, a door configured to open and close an opening of the cabinet, and an outside air heat inductor arrangeable inside the door to extend toward the cabinet from a front portion of the door. The outside air heat inductor includes a first heat transfer path forming member configured to transfer outside air heat from outside the refrigerator toward a surface of the cabinet, and a second heat transfer path forming member arrangeable between the first heat transfer path forming member and an inside of the cabinet such that while the second heat transfer path forming member is arranged between the first heat transfer path forming member and the inside of the cabinet, the second heat transfer path forming member receives the outside air heat and prevents cold air within the cabinet from being transferred to the first heat transfer path forming member.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hitoshi TAKASE, Ryota AOKI, Tomohiko MATSUNO, Makoto SHIBUYA
  • Publication number: 20240128246
    Abstract: One example includes an apparatus that includes an insulating layer and an electrically conductive layer on the insulating layer. The conductive layer includes a plurality of electrically isolated and conductive regions. A first switch is on a first of the conductive regions, and the first switch has a first terminal and a second terminal. A second switch is on a second of the conductive regions, and the second switch has a third terminal and fourth terminal. A passive component has a fifth terminal and a sixth terminal. The first and third terminals are coupled to the first conductive region. The fourth and sixth terminals are coupled to the second conductive region. The second and fifth terminals are coupled to a third of the conductive regions.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Inventors: Kwang-Soo KIM, Makoto SHIBUYA, Johan STRYDOM
  • Publication number: 20240120308
    Abstract: An electronic device includes a substrate having first and second conductive traces, a semiconductor die having a transistor with a first terminal and a second terminal, and first and second metal clips. The first metal clip has a first end portion coupled to the first terminal of the transistor, and a second end portion coupled to the first conductive trace of the substrate. The second metal clip has a first end portion coupled to the second terminal of the transistor and a second end portion coupled to the second conductive trace of the substrate, and a middle portion of the second metal clip is spaced apart from and at least partially overlying a portion of the first metal clip.
    Type: Application
    Filed: October 6, 2022
    Publication date: April 11, 2024
    Inventors: Kwang-Soo Kim, Makoto Shibuya, Woochan Kim, Vivek Arora
  • Patent number: 11955456
    Abstract: In a described example, an apparatus includes: a first package substrate having a die mount surface; a semiconductor die flip chip mounted to the first package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the semiconductor die having solder bumps, wherein the solder bumps form solder joints to the package substrate; a second package substrate having a thermal pad positioned with the thermal pad over a backside surface of the semiconductor die, the thermal pad comprising a thermally conductive material; and a mold compound covering a portion of the first package substrate, a portion of the second package substrate, the semiconductor die, and the post connects, thermal pad having a surface exposed from the mold compound.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: April 9, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anindya Poddar, Ashok Surendra Prabhu, Hau Nguyen, Kurt Edward Sincerbox, Makoto Shibuya
  • Publication number: 20240105537
    Abstract: An electronic device includes a semiconductor die attached to a die attach pad, a package structure having opposite first and second sides, opposite third and fourth sides spaced apart from one another along a first direction, and opposite fifth and sixth sides spaced apart from one another along an orthogonal second direction, conductive leads positioned along opposite third and fourth sides of the package structure, tie bars extending from the die attach pad and having respective ends exposed along the respective fifth and sixth sides of the package structure, and the fifth and sixth sides of the package structure each have individual indents that extend to a respective one of the third and fourth sides of the package structure.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 28, 2024
    Inventor: Makoto Shibuya
  • Patent number: 11942384
    Abstract: A semiconductor package including a leadframe has a plurality of leads, and a semiconductor die including bond pads attached to the leadframe with the bond pads electrically coupled to the plurality of leads. The semiconductor die includes a substrate having a semiconductor surface including circuitry having nodes coupled to the bond pads. A mold compound encapsulates the semiconductor die. The mold compound is interdigitated having alternating extended mold regions over the plurality of leads and recessed mold regions in between adjacent ones of the plurality of leads.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: March 26, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Makoto Shibuya, Masamitsu Matsuura, Kengo Aoya, Hideaki Matsunaga, Anindya Poddar
  • Patent number: 11933533
    Abstract: A blower configured to circulate cold air inside a body of a refrigerator. The blower includes a casing, an impeller accommodated in the casing, and a support member configured to support the impeller against the casing. The impeller includes a disk-shaped base plate rotatably supported by the support member. The casing includes an inner circumferential surface extending so as to gradually move away from an outer circumference of the base plate toward a rotational direction of the impeller at a predetermined position around the outer circumference of the base plate, and a first case flow path between the inner circumferential surface and the outer circumference. An introduction port configured to introduce the cold air to a second case flow path branched from the first case flow path is formed on the inner circumferential surface of the casing.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: March 19, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tomohiko Matsuno, Tomoharu Iwamoto, Makoto Shibuya, Tatsuya Seo, Hitoshi Takase
  • Publication number: 20240055275
    Abstract: A method of fabricating an electronic device includes injecting molding compound into respective column cavities of a mold to enclose semiconductor dies of respective unit regions of a lead frame panel in the respective column cavities and inserting a blade into the respective column cavities of the mold between adjacent unit regions of the lead frame panel to separate individual molded package structures in the respective column cavities of the mold along a column direction.
    Type: Application
    Filed: August 15, 2022
    Publication date: February 15, 2024
    Inventors: Makoto Shibuya, Han Meng @ Eugene Lee
  • Patent number: 11848244
    Abstract: In examples, a wafer chip scale package (WCSP) comprises a semiconductor die including a device side having circuitry formed therein. The WCSP includes a redistribution layer (RDL) including an insulation layer abutting the device side and a metal trace coupled to the device side and abutting the insulation layer. The WCSP includes a conductive member coupled to the metal trace, the conductive member in a first vertical plane that is positioned no farther than a quarter of a horizontal width of the semiconductor die from a vertical axis extending through a center of the semiconductor die. The WCSP includes a lead coupled to the conductive member and extending horizontally past a second vertical plane defined by a perimeter of the semiconductor die.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: December 19, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Makoto Shibuya, Masamitsu Matsuura, Kengo Aoya
  • Patent number: 11842952
    Abstract: System, method, and silicon chip package for providing structural strength, heat dissipation and electrical connectivity using “W” shaped frame bonded to the one or more dies, wherein the “W” shaped frame provides compression strength to the silicon chip package when the one or more dies are bonded, and electrically conductivity between for the one or more dies to leads of silicon chip package, and heat dissipation for the silicon chip package.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: December 12, 2023
    Assignee: Texas Instruments Incorporated
    Inventor: Makoto Shibuya
  • Publication number: 20230386963
    Abstract: A power converter module includes a substrate having a first surface and a second surface that opposes the first surface. The power converter module includes a thick printed copper (TPC) substrate on the first surface of the substrate. The TPC substrate includes a first layer having TPC patterned on the first surface of the substrate and a second layer with dielectric patterned on the first layer. The TPC substrate includes a third layer having TPC patterned on the second layer. The power converter module includes power transistors mounted on the TPC substrate and a control integrated circuit (IC) chip mounted on the TPC substrate.
    Type: Application
    Filed: May 31, 2022
    Publication date: November 30, 2023
    Inventors: WOOCHAN KIM, Vivek Kishorechand Arora, Ninad Shahane, Makoto Shibuya
  • Publication number: 20230307314
    Abstract: A semiconductor device includes a direct bonded copper (DBC) substrate including a plurality of indentations in at least a top side of a ceramic substrate. The plurality of indentations are filled with a metal filler to provide metal filled dimples. A top copper layer is a patterned layer that is on the top side and provides leads, and there is at least one semiconductor die having bond pads electrically connected to the leads.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 28, 2023
    Inventors: Kwnag-Soo Kim, Makoto Shibuya, Vivek Kishorechand Arora
  • Patent number: 11764142
    Abstract: In described examples, a packaged semiconductor device includes a frame, a pre-fabricated interposer, and an integrated circuit die. The frame includes multiple conductive frame leads and multiple conductive connection points, as well as a hole in the frame surrounded by the frame leads and the conductive connection points. The pre-molded interposer has an external perimeter including multiple conductive interposer leads, and is for insertion into the hole. At least one of the interposer leads does not extend to the external perimeter of the interposer. The die is electrically coupled to selected ones of the frame leads and of the interposer leads. The interposer is inserted into the hole and coupled to the frame, and the frame, interposer, and die are together encapsulated by encapsulation material.
    Type: Grant
    Filed: January 4, 2022
    Date of Patent: September 19, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Makoto Shibuya
  • Publication number: 20230291340
    Abstract: Provided is a motor control device capable of improving efficiency in real time by a neural network structure that directly derives, in a learning manner, an output signal providing optimal efficiency. A motor control device 1 is adapted to control a motor 6, and includes a neural network compensator 11 that receives input signals and repeats learning based on forward propagation and backpropagation thereby to derive an output signal providing optimal efficiency. Input signals are a motor current, a motor parameter and torque, and the like, and output signals are a current command value and a current phase command value. The motor 6 is controlled on the basis of an output signal derived by the neural network compensator 11.
    Type: Application
    Filed: August 2, 2021
    Publication date: September 14, 2023
    Applicants: NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY, SANDEN CORPORATION
    Inventors: Seiji HASHIMOTO, Masayuki KIGURE, Makoto SHIBUYA
  • Publication number: 20230275007
    Abstract: In some examples, a semiconductor package comprises a semiconductor die including a device side having a circuit; a mold compound covering the semiconductor die and the circuit; a first lead coupled to the circuit, the first lead having a gullwing shape and emerging from the mold compound in a first horizontal plane, the first lead having a distal end coincident with a second horizontal plane lower than a bottom surface of the mold compound; and a second lead coupled to the circuit, the second lead emerging from the mold compound in the first horizontal plane, the second lead having a distal end coincident with a third horizontal plane higher than a topmost surface of the mold compound, the distal end of the second lead vertically coincident with the mold compound.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Inventors: Makoto SHIBUYA, Masamitsu Matsuura, Kengo Aoya, Anindya Poddar
  • Patent number: 11725864
    Abstract: A refrigerator is provided. The refrigerator includes a main cabinet including a cooling device to generate cold air, a sub-cabinet detachably connected to the main cabinet, a cold air relay duct provided to connect the main cabinet and the sub-cabinet and having a cold air flow path to allow the cold air generated by the cooling device to be delivered to the sub-cabinet, and a heat blocking member provided in a portion of the cold air flow path at which the main cabinet and the cold air relay duct are connected and in a portion of the cold air flow path at which the sub-cabinet and the cold air relay duct are connected.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: August 15, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kentaro Kan, Hiroshi Nakamura, Makoto Shibuya, Manabu Kikuchi, Ryota Aoki, Tomohiko Matsuno
  • Publication number: 20230253281
    Abstract: An integrated circuit package includes a semiconductor die having a first surface and a second surface. The first surface is attached to a top surface of a die attach pad, and the second surface has a sensing area thereon. A mold compound covers or encapsulates at least a portion of the die attach pad and the semiconductor die. A channel is formed in a top portion of the mold compound. The channel extends from a first side of the mold compound to a second side of the mold compound. A cavity is formed between the channel and the sensing area so that the sensing area is exposed to the environment.
    Type: Application
    Filed: February 9, 2022
    Publication date: August 10, 2023
    Inventors: Daiki Komatsu, Makoto Shibuya
  • Publication number: 20230238350
    Abstract: An IC package includes an interconnect having a first platform and a second platform that are spaced apart. The IC package includes a die superposing a portion of the first platform of the interconnect. The die has a field effect transistor (FET), and a matrix of pads for the FET situated on a surface of the die. The matrix of pads having a row of source pads and a row of drain pads. A drain wire bond extends from a first drain pad to a second drain pad of the row of drain pads and to the first platform of the interconnect. A source wire bond extends from a first source pad to a second source pad of the row of source pads, back over the first source pad and is coupled to a connection region of the first platform.
    Type: Application
    Filed: January 26, 2022
    Publication date: July 27, 2023
    Inventors: Makoto Shibuya, Kwang-Soo Kim
  • Publication number: 20230198422
    Abstract: A power converter module includes power transistors and a substrate having a first surface and a second surface that opposes the first surface. A thermal pad is situated on the second surface of the substrate, and the thermal pad is configured to be thermally coupled to a heat sink. The power converter module also includes a control module mounted on a first surface of the substrate. The control module also includes control IC chips coupled to the power transistors. A first control IC chip controls a first switching level of the power converter module and a second control IC chip controls a second switching level of the power converter module. Shielding planes overlay the substrate. A first shielding plane is situated between the thermal pad and the first control IC chip and a second shielding plane is situated between the thermal pad and a second control IC chip.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 22, 2023
    Inventors: Woochan Kim, Vivek Kishorechand Arora, Makoto Shibuya, Kengo Aoya
  • Patent number: 11656021
    Abstract: A refrigerator having detachably adjacent cabinets is provided. The refrigerator includes a connection mechanism interposed between cabinets adjacent to each other and connecting the cabinets to each other and a manipulation portion configured to drive the connection mechanism by being manipulated from outside, wherein the connection mechanism is configured for the cabinet on one side is pulled toward the cabinet on the other side by a manipulation of the manipulation portion.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: May 23, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Makoto Shibuya, Kentaro Kan, Manabu Kikuchi, Tomohiko Matsuno