Patents by Inventor Makoto Tsurumaru

Makoto Tsurumaru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11175189
    Abstract: An electronics device includes a power semiconductor device including a temperature detection diode, a first semiconductor integrated circuit device including a detection circuit for detecting VF from the temperature detection diode and a second semiconductor integrated circuit device. The second semiconductor integrated circuit device includes, an outside air temperature acquisition unit which acquires outside air temperature information, a storage which stores temperature characteristic data of the temperature detection diode and a first value based on a signal from the detection circuit at a first temperature and a temperature arithmetic processing unit which calculates a temperature of the power semiconductor device from a third value based on a signal from the detection circuit, the temperature characteristic data, the first temperature acquired by the outside air temperature acquisition unit and the first value.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: November 16, 2021
    Assignee: Renesas Electronics Corporation
    Inventor: Makoto Tsurumaru
  • Patent number: 10324114
    Abstract: Adjustment of drive control based on a detection voltage of a transformer requires a loop time, and therefore high-speed processing of the adjustment is difficult. A semiconductor integrated circuit device includes a driving circuit that drives a power semiconductor device and a driving capability control circuit that controls a driving capability of the driving circuit. The driving circuit stops driving of the power semiconductor device based on an abnormal current detected from a sense current of the power semiconductor device. The driving capability control circuit controls the driving capability of the driving circuit based on a normal current detected from the sense current of the power semiconductor device.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: June 18, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Makoto Tsurumaru
  • Publication number: 20190178726
    Abstract: An electronics device includes a power semiconductor device including a temperature detection diode, a first semiconductor integrated circuit device including a detection circuit for detecting VF from the temperature detection diode and a second semiconductor integrated circuit device. The second semiconductor integrated circuit device includes, an outside air temperature acquisition unit which acquires outside air temperature information, a storage which stores temperature characteristic data of the temperature detection diode and a first value based on a signal from the detection circuit at a first temperature and a temperature arithmetic processing unit which calculates a temperature of the power semiconductor device from a third value based on a signal from the detection circuit, the temperature characteristic data, the first temperature acquired by the outside air temperature acquisition unit and the first value.
    Type: Application
    Filed: February 14, 2019
    Publication date: June 13, 2019
    Inventor: Makoto TSURUMARU
  • Patent number: 10247616
    Abstract: An electronics device includes a power semiconductor device including a temperature detection diode, a first semiconductor integrated circuit device including a detection circuit for detecting VF from the temperature detection diode and a second semiconductor integrated circuit device. The second semiconductor integrated circuit device includes, an outside air temperature acquisition unit which acquires outside air temperature information, a storage which stores temperature characteristic data of the temperature detection diode and a first value based on a signal from the detection circuit at a first temperature and a temperature arithmetic processing unit which calculates a temperature of the power semiconductor device from a third value based on a signal from the detection circuit, the temperature characteristic data, the first temperature acquired by the outside air temperature acquisition unit and the first value.
    Type: Grant
    Filed: February 28, 2016
    Date of Patent: April 2, 2019
    Assignee: Renesas Electronics Corporation
    Inventor: Makoto Tsurumaru
  • Patent number: 10211824
    Abstract: A semiconductor device includes a drive control circuit which drives a gate terminal of an IGBT. The drive control circuit includes a state machine control circuit, a base data memory and a current drive circuit which drives the IGBT on the basis of driving current information stored in the base data memory. The state machine control circuit reads out driving current information for rising stored in the base data memory a plurality of times in a predetermined time period and drives the current drive circuit at rising of a PWM signal, and reads out driving current information for falling stored in the base data memory a plurality of times in a predetermined time period and drives the current drive circuit at falling of the PWM signal.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: February 19, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Makoto Tsurumaru
  • Patent number: 10175275
    Abstract: A semiconductor integrated circuit device includes a temperature prediction circuit that predicts the temperature of a power semiconductor device having a built-in switching transistor. The temperature prediction circuit includes: a delay circuit that stores a history of electric power values for a specific number of times, the electric power values being calculated based on the steady loss and switching loss of the switching transistor; and a circuit that calculates the temperature prediction value of the power semiconductor device based on the value of the delay circuit and a time factor corresponding to a temperature heat dissipation characteristic.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: January 8, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Makoto Tsurumaru
  • Patent number: 10116296
    Abstract: An electronic device has a power semiconductor device, a first semiconductor integrated circuit device, and a second semiconductor integrated circuit device. The power semiconductor device has a terminal outputting sense current. The first semiconductor integrated circuit device has an overcurrent detection circuit detecting overcurrent on the basis of the sense current, and a temperature detection circuit detecting temperature of the power semiconductor device. The second semiconductor integrated circuit device has a storage device storing a temperature characteristic of a current mirror ratio of the power semiconductor device, a temperature detecting unit calculating temperature on the basis of an output of the temperature detection circuit, and an overcurrent detection control unit controlling the overcurrent detection circuit on the basis of the temperature detected by the temperature detecting unit and the temperature characteristic of the current mirror ratio stored in the storage device.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: October 30, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Makoto Tsurumaru, Kenta Sadakata
  • Publication number: 20180159521
    Abstract: A semiconductor device includes a drive control circuit which drives a gate terminal of an IGBT. The drive control circuit includes a state machine control circuit, a base data memory and a current drive circuit which drives the IGBT on the basis of driving current information stored in the base data memory. The state machine control circuit reads out driving current information for rising stored in the base data memory a plurality of times in a predetermined time period and drives the current drive circuit at rising of a PWM signal, and reads out driving current information for falling stored in the base data memory a plurality of times in a predetermined time period and drives the current drive circuit at falling of the PWM signal.
    Type: Application
    Filed: October 26, 2017
    Publication date: June 7, 2018
    Inventor: Makoto TSURUMARU
  • Publication number: 20180067150
    Abstract: Adjustment of drive control based on a detection voltage of a transformer requires a loop time, and therefore high-speed processing of the adjustment is difficult. A semiconductor integrated circuit device includes a driving circuit that drives a power semiconductor device and a driving capability control circuit that controls a driving capability of the driving circuit. The driving circuit stops driving of the power semiconductor device based on an abnormal current detected from a sense current of the power semiconductor device. The driving capability control circuit controls the driving capability of the driving circuit based on a normal current detected from the sense current of the power semiconductor device.
    Type: Application
    Filed: October 30, 2017
    Publication date: March 8, 2018
    Applicant: Renesas Electronics Corporation
    Inventor: Makoto TSURUMARU
  • Patent number: 9835658
    Abstract: Adjustment of drive control based on a detection voltage of a transformer requires a loop time, and therefore high-speed processing of the adjustment is difficult. A semiconductor integrated circuit device includes a driving circuit that drives a power semiconductor device and a driving capability control circuit that controls a driving capability of the driving circuit. The driving circuit stops driving of the power semiconductor device based on an abnormal current detected from a sense current of the power semiconductor device. The driving capability control circuit controls the driving capability of the driving circuit based on a normal current detected from the sense current of the power semiconductor device.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: December 5, 2017
    Assignee: Renesas Electronics Corporation
    Inventor: Makoto Tsurumaru
  • Publication number: 20170093390
    Abstract: An electronic device has a power semiconductor device, a first semiconductor integrated circuit device, and a second semiconductor integrated circuit device. The power semiconductor device has a terminal outputting sense current. The first semiconductor integrated circuit device has an overcurrent detection circuit detecting overcurrent on the basis of the sense current, and a temperature detection circuit detecting temperature of the power semiconductor device. The second semiconductor integrated circuit device has a storage device storing a temperature characteristic of a current mirror ratio of the power semiconductor device, a temperature detecting unit calculating temperature on the basis of an output of the temperature detection circuit, and an overcurrent detection control unit controlling the overcurrent detection circuit on the basis of the temperature detected by the temperature detecting unit and the temperature characteristic of the current mirror ratio stored in the storage device.
    Type: Application
    Filed: August 11, 2016
    Publication date: March 30, 2017
    Inventors: Makoto TSURUMARU, Kenta SADAKATA
  • Publication number: 20170063367
    Abstract: Adjustment of drive control based on a detection voltage of a transformer requires a loop time, and therefore high-speed processing of the adjustment is difficult. A semiconductor integrated circuit device includes a driving circuit that drives a power semiconductor device and a driving capability control circuit that controls a driving capability of the driving circuit. The driving circuit stops driving of the power semiconductor device based on an abnormal current detected from a sense current of the power semiconductor device. The driving capability control circuit controls the driving capability of the driving circuit based on a normal current detected from the sense current of the power semiconductor device.
    Type: Application
    Filed: July 22, 2016
    Publication date: March 2, 2017
    Applicant: Renesas Electronics Corporation
    Inventor: Makoto TSURUMARU
  • Publication number: 20160356655
    Abstract: A semiconductor integrated circuit device includes a temperature prediction circuit that predicts the temperature of a power semiconductor device having a built-in switching transistor. The temperature prediction circuit includes: a delay circuit that stores a history of electric power values for a specific number of times, the electric power values being calculated based on the steady loss and switching loss of the switching transistor; and a circuit that calculates the temperature prediction value of the power semiconductor device based on the value of the delay circuit and a time factor corresponding to a temperature heat dissipation characteristic.
    Type: Application
    Filed: June 3, 2016
    Publication date: December 8, 2016
    Inventor: Makoto TSURUMARU
  • Publication number: 20160258821
    Abstract: An electronics device includes a power semiconductor device including a temperature detection diode, a first semiconductor integrated circuit device including a detection circuit for detecting VF from the temperature detection diode and a second semiconductor integrated circuit device. The second semiconductor integrated circuit device includes, an outside air temperature acquisition unit which acquires outside air temperature information, a storage which stores temperature characteristic data of the temperature detection diode and a first value based on a signal from the detection circuit at a first temperature and a temperature arithmetic processing unit which calculates a temperature of the power semiconductor device from a third value based on a signal from the detection circuit, the temperature characteristic data, the first temperature acquired by the outside air temperature acquisition unit and the first value.
    Type: Application
    Filed: February 28, 2016
    Publication date: September 8, 2016
    Inventor: Makoto TSURUMARU
  • Patent number: 6748036
    Abstract: The invention provides a radio receiving method and apparatus by which adjustment of a reception frequency when a radio modulation signal of a PSK system is received is realized by simple processing. Phase data is sampled out in a predetermined cycle from a random received modulation signal and cumulatively added for a predetermined period, and the reception frequency is adjusted so that a calculation result of the cumulative addition may satisfy a predetermined allowance range. Consequently, the reception frequency can be adjusted by simple processing without detecting a phase error from the modulation signal.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: June 8, 2004
    Assignee: NEC Corporation
    Inventor: Makoto Tsurumaru
  • Patent number: 5918204
    Abstract: A speech frame is converted to speech bursts and interleaved over a predetermined number of TDMA frames for transmission. At a receive site, the transmitted signal is equalized and a quality signal indicating the quality of each burst signal is produced from the equalized signal. The equalized signal is de-interleaved, and then Vitrerbi-decoded speech samples are produced. A CRC circuit performs an error check operation on the decoded speech samples to produce an error bit if a speech frame failed the check. A decision circuit compares the quality signal with a first reference value and produces a first disable signal when it is lower than the first reference value. The decision circuit compares a total sum of the quality signals produced from the predetermined number of burst signals with a second reference value and produces a second disable signal when the total sum of the quality signals is lower than the second reference value.
    Type: Grant
    Filed: December 27, 1996
    Date of Patent: June 29, 1999
    Assignee: NEC Corporation
    Inventor: Makoto Tsurumaru
  • Patent number: 5291519
    Abstract: A reference voltage (V.sub.ref) is set to a received signal level corresponding to an anticipated data error rate and compared with outputs of intermediate frequency amplifiers (3-1, 3-2) by comparators (7-1, 7-2). When the outputs of the intermediate frequency amplifiers (3- 1, 3-2) are lower than the reference voltage (V.sub.ref), operation of receiving circuits (A12-1, B12-2) is stopped. At inter symbol interference amount calculating sections (6-1, 6-2), inter symbol interference amounts are calculated from auto-correlation parameters of preamble signal bit trains included in received signal data, and selectors (9-1, 9-2) are controlled so that a diversity branch having the least residual inter symbol interference amount or the highest S/N ratio is selected and the received signal data of the selected branch are inputted to an equalizing section (11). When a signal having a high data error rate is received, operation of the corresponding receiving circuit is stopped.
    Type: Grant
    Filed: February 18, 1992
    Date of Patent: March 1, 1994
    Assignee: NEC Corporation
    Inventor: Makoto Tsurumaru