Patents by Inventor Makoto Wakazono

Makoto Wakazono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9699905
    Abstract: To provide a wiring board ensuring adhesion strength of a connecting terminal to reduce the connecting terminal from being fallen over or peeled off under fabrication process. The wiring board according to the present invention includes a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body and a filling member filled up between the plurality of connecting terminals. The filling member is filled up to a position lower than a height of the plurality of connecting terminals. The connecting terminals has a cross section with a trapezoidal shape where a width of a first principal surface on a side contacting the laminated body is wider than a width of a second principal surface facing the first principal surface.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: July 4, 2017
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Tomohiro Nishida, Makoto Wakazono, Seiji Mori
  • Patent number: 9560739
    Abstract: To provide a wiring substrate which can prevent short circuit between connection terminals, and which realizes reduction of the pitch between the connection terminals. The wiring substrate of the present invention includes a layered structure including one or more insulation layers and one or more conductor layers, and the wiring substrate is characterized in that a plurality of connection terminals are formed on the layered structure so as to be separated from one another; a filling member is filled between the connection terminals; and each of the connection terminals has a side surface composed of a contact surface which is in contact with the filling member, and a spaced surface which is not in contact with the filling member and which is located above the contact surface and below the top surface of the filling member.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: January 31, 2017
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Patent number: 9538650
    Abstract: In a wiring substrate, formation of voids due to underfill filling failure is suppressed. A wiring substrate includes an insulating base layer, an insulating layer laminated on the base layer, and an electrically conductive connection terminal projecting from the insulating layer inside an opening. The insulating layer has a first surface with an opening, and a second surface located within the opening and being concave toward the base layer in relation to the first surface. The second surface extends from the first surface to the connection terminal inside the opening. On a cut surface which is a flat surface extending along a lamination direction in which the insulating layer is laminated on the base layer, an angle which is larger than 0° but smaller than 90° is formed between a normal line extending from an arbitrary point on the second surface toward the outside of the insulating layer and a parallel line extending from the arbitrary point toward the connection terminal in parallel to the first surface.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: January 3, 2017
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Patent number: 9516751
    Abstract: To provide a wiring board excellent in connection reliability with a semiconductor chip. A first buildup layer 31 where resin insulating layers 21 and 22 and a conductor layer 24 are laminated is formed at a substrate main surface 11 side of an organic wiring board 10. The conductor layer 24 for an outermost layer in the first buildup layer 31 includes a plurality of connecting terminal portions 41 for flip-chip mounting a semiconductor chip. The plurality of connecting terminal portions 41 is exposed through an opening portion 43 of a solder resist layer 25. Each connecting terminal portion 41 includes a connection region 51 for a semiconductor chip and a wiring region 52 disposed to extend from the connection region 51 along the planar direction.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: December 6, 2016
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro Hayashi, Makoto Nagai, Seiji Mori, Tomohiro Nishida, Makoto Wakazono, Tatsuya Ito
  • Patent number: 9485853
    Abstract: A wiring substrate according to the present invention includes a laminate of one or more insulation layers and one or more conductive layers and further includes a plurality of connection terminals formed on the laminate and spaced apart from one another, each having a step formed at the outer periphery of a first main surface opposite a contact surface in contact with the laminate, and a filling member provided in a filling manner between the connection terminals.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: November 1, 2016
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Tatsuya Ito, Seiji Mori, Takahiro Hayashi, Makoto Wakazono, Tomohiro Nishida
  • Patent number: 9420703
    Abstract: To provide a wiring board in which wiring conductors are securely protected by a precise and rigid dam portion formed on an outermost layer of a laminate and that is excellent in connection reliability with a semiconductor chip. A laminate that configures this wiring board includes multiple connection terminal portions and wiring conductors as a conductor layer of the outermost layer. The wiring conductors are arranged at predetermined positions, passing through between multiple connection terminal portions for flip-chip mounting a semiconductor chip. A resin insulating layer of the outermost layer of the laminate has a dam portion and a reinforcement portion. The dam portion covers the wiring conductors. The reinforcement portion is formed, between the wiring conductor and the connection terminal portion that is adjacent to the wiring conductor, lower than a height of the dam portion. The reinforcement portion is concatenated with a side surface of the dam portion.
    Type: Grant
    Filed: May 27, 2013
    Date of Patent: August 16, 2016
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro Hayashi, Makoto Nagai, Tatsuya Ito, Seiji Mori, Makoto Wakazono, Tomohiro Nishida
  • Publication number: 20150334837
    Abstract: To provide a wiring board ensuring adhesion strength of a connecting terminal to reduce the connecting terminal from being fallen over or peeled off under fabrication process. The wiring board according to the present invention includes a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body and a filling member filled up between the plurality of connecting terminals. The filling member is filled up to a position lower than a height of the plurality of connecting terminals. The connecting terminals has a cross section with a trapezoidal shape where a width of a first principal surface on a side contacting the laminated body is wider than a width of a second principal surface facing the first principal surface.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 19, 2015
    Inventors: Tomohiro NISHIDA, Makoto WAKAZONO, Seiji MORI
  • Patent number: 9179552
    Abstract: To obtain a wiring board that allows improving flowability of an underfill to be filled up a clearance between an electronic component and the wiring board. The present invention is a wiring board with a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body, a filling member filled up between the plurality of connecting terminals, and a solder resist layer laminated on the laminated body. The filling member is in contact with at least a part of each side surface of the plurality of connecting terminals. The solder resist layer includes an opening that exposes the plurality of connecting terminals. The filling member has a surface roughness rougher than a surface roughness of a top surface of the solder resist layer.
    Type: Grant
    Filed: April 10, 2013
    Date of Patent: November 3, 2015
    Assignee: NRK SPARK PLUG CO., LTD.
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Patent number: 9131621
    Abstract: A wiring substrate includes a layered structure including one or more insulating layers and one or more conductor layers; a plurality of connection terminals formed on the layered structure; a first resin layer formed on the layered structure and having (defining) a plurality of first openings through which the connection terminals are respectively exposed; and a second resin layer formed on the first resin layer and having (defining) a plurality of second openings through which the connection terminals are respectively exposed and which are smaller in opening diameter than the first openings, wherein the second resin layer has, around each of the second openings, an inclined surface which is formed such that the distance between the inclined surface and the layered structure decreases toward the second opening.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: September 8, 2015
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takahiro Hayashi, Makoto Wakazono, Takeshi Toyoshima, Makoto Nagai, Makoto Origuchi
  • Publication number: 20150223332
    Abstract: In a wiring substrate, formation of voids due to underfill filling failure is suppressed. A wiring substrate includes an insulating base layer, an insulating layer laminated on the base layer, and an electrically conductive connection terminal projecting from the insulating layer inside an opening. The insulating layer has a first surface with an opening, and a second surface located within the opening and being concave toward the base layer in relation to the first surface. The second surface extends from the first surface to the connection terminal inside the opening. On a cut surface which is a flat surface extending along a lamination direction in which the insulating layer is laminated on the base layer, an angle which is larger than 0° but smaller than 90° is formed between a normal line extending from an arbitrary point on the second surface toward the outside of the insulating layer and a parallel line extending from the arbitrary point toward the connection terminal in parallel to the first surface.
    Type: Application
    Filed: August 23, 2013
    Publication date: August 6, 2015
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Publication number: 20150216059
    Abstract: To provide a wiring board in which wiring conductors are securely protected by a precise and rigid dam portion formed on an outermost layer of a laminate and that is excellent in connection reliability with a semiconductor chip. A laminate that configures this wiring board includes multiple connection terminal portions and wiring conductors as a conductor layer of the outermost layer. The wiring conductors are arranged at predetermined positions, passing through between multiple connection terminal portions for flip-chip mounting a semiconductor chip. A resin insulating layer of the outermost layer of the laminate has a dam portion and a reinforcement portion. The dam portion covers the wiring conductors. The reinforcement portion is formed, between the wiring conductor and the connection terminal portion that is adjacent to the wiring conductor, lower than a height of the dam portion. The reinforcement portion is concatenated with a side surface of the dam portion.
    Type: Application
    Filed: May 27, 2013
    Publication date: July 30, 2015
    Inventors: Takahiro Hayashi, Makoto Nagai, Tatsuya Ito, Seiji Mori, Makoto Wakazono, Tomohiro Nishida
  • Publication number: 20150208501
    Abstract: To provide a wiring board excellent in connection reliability with a semiconductor chip. A first buildup layer 31 where resin insulating layers 21 and 22 and a conductor layer 24 are laminated is formed at a substrate main surface 11 side of an organic wiring board 10. The conductor layer 24 for an outermost layer in the first buildup layer 31 includes a plurality of connecting terminal portions 41 for flip-chip mounting a semiconductor chip. The plurality of connecting terminal portions 41 is exposed through an opening portion 43 of a solder resist layer 25. Each connecting terminal portion 41 includes a connection region 51 for a semiconductor chip and a wiring region 52 disposed to extend from the connection region 51 along the planar direction.
    Type: Application
    Filed: May 17, 2013
    Publication date: July 23, 2015
    Inventors: Takahiro Hayashi, Makoto Nagai, Seiji Mori, Tomohiro Nishida, Makoto Wakazono, Tatsuya Ito
  • Publication number: 20150027750
    Abstract: To provide a wiring substrate which can prevent short circuit between connection terminals, and which realizes reduction of the pitch between the connection terminals. The wiring substrate of the present invention includes a layered structure including one or more insulation layers and one or more conductor layers, and the wiring substrate is characterized in that a plurality of connection terminals are formed on the layered structure so as to be separated from one another; a filling member is filled between the connection terminals; and each of the connection terminals has a side surface composed of a contact surface which is in contact with the filling member, and a spaced surface which is not in contact with the filling member and which is located above the contact surface and below the top surface of the filling member.
    Type: Application
    Filed: April 10, 2013
    Publication date: January 29, 2015
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Publication number: 20140318846
    Abstract: A wiring substrate includes a layered structure including one or more insulating layers and one or more conductor layers; a plurality of connection terminals formed on the layered structure; a first resin layer formed on the layered structure and having (defining) a plurality of first openings through which the connection terminals are respectively exposed; and a second resin layer formed on the first resin layer and having (defining) a plurality of second openings through which the connection terminals are respectively exposed and which are smaller in opening diameter than the first openings, wherein the second resin layer has, around each of the second openings, an inclined surface which is formed such that the distance between the inclined surface and the layered structure decreases toward the second opening.
    Type: Application
    Filed: April 22, 2014
    Publication date: October 30, 2014
    Applicant: NGK Spark Plug Co., Ltd.
    Inventors: Takahiro HAYASHI, Makoto WAKAZONO, Takeshi TOYOSHIMA, Makoto NAGAI, Makoto ORIGUCHI
  • Publication number: 20140284081
    Abstract: A wiring board includes a substrate layer, an insulating layer laminated on the substrate layer and a connection terminal exposed from the insulating layer. The insulating layer has a first surface formed with an opening, a second surface located inside the opening and recessed toward the substrate layer and a wall surface located inside the opening and extending between the first and second surfaces in a lamination direction of the insulating layer. The second surface extends between the wall surface and the connection terminal and has a curved shape being convex toward the substrate layer and including a deepest part closest to the substrate layer so as to satisfy relationship of L1>L2 where L1 is a length between the wall surface and the deepest part in a layer in-plane direction; and L2 is a length between the deepest part and the connection terminal in the layer in-plane direction.
    Type: Application
    Filed: August 5, 2013
    Publication date: September 25, 2014
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Publication number: 20140196939
    Abstract: To obtain a wiring board that allows improving flowability of an underfill to be filled up a clearance between an electronic component and the wiring board. The present invention is a wiring board with a laminated body where one or more layer of each of an insulating layer and a conductor layer are laminated. The wiring board includes a plurality of connecting terminals formed separately from one another on the laminated body, a filling member filled up between the plurality of connecting terminals, and a solder resist layer laminated on the laminated body. The filling member is in contact with at least a part of each side surface of the plurality of connecting terminals. The solder resist layer includes an opening that exposes the plurality of connecting terminals. The filling member has a surface roughness rougher than a surface roughness of a top surface of the solder resist layer.
    Type: Application
    Filed: April 10, 2013
    Publication date: July 17, 2014
    Inventors: Tomohiro Nishida, Seiji Mori, Makoto Wakazono
  • Publication number: 20140124242
    Abstract: A wiring substrate according to the present invention includes a laminate of one or more insulation layers and one or more conductive layers and further includes a plurality of connection terminals formed on the laminate and spaced apart from one another, each having a step formed at the outer periphery of a first main surface opposite a contact surface in contact with the laminate, and a filling member provided in a filling manner between the connection terminals.
    Type: Application
    Filed: May 16, 2012
    Publication date: May 8, 2014
    Applicants: NGK SPARK PLUG CO., LTD., NGK SPARK PLUG CO., LTD.
    Inventors: Tatsuya Ito, Seiji Mori, Takahiro Hayashi, Makoto Wakazono, Tomohiro Nishida
  • Patent number: 7438969
    Abstract: A solvent-free filling material comprising a filler, a thermosetting resin, a curing agent, and a curing catalyst, wherein the thermosetting resin is an epoxy resin, and the curing agent is a dicyandiamide curing agent; a multilayer printed wiring board comprising a substrate, a through-hole, the filling material filling the through-hole, and a conductor layer formed on an exposed surface of the filling material in the through-hole; and a process for producing the multilayer printed wiring board.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: October 21, 2008
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Toshifumi Kojima, Makoto Wakazono, Toshikatu Takada
  • Patent number: 7183497
    Abstract: A multilayer wiring board (11) is provided which includes a core substrate (12) including a plurality of through-holes (15). The through-holes (15) include through-hole conductors (17) on the inner walls of corresponding penetration holes (16) of a diameter of 200 ?m or less. Interlayer insulating layers (31, 32) are disposed on opposite sides of the principal planes (13, 14) of the core substrate (12). Wiring layers (23, 24) are disposed on the surface of interlayer insulating layers (31, 32). The through-holes (15) are filled with a hardened filling material (18). Lid conductors (21, 22) close the openings of the through-holes (15). The value of linear expansion of the hardened filling material (18) is 1.2% or less in the temperature region from room temperature to the solder reflow temperature. The board has excellent connection reliability and exhibits little or no cracking or delamination in the lid conductor closing the openings of the through-holes and in the surrounding conductor area.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: February 27, 2007
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Toshifumi Kojima, Makoto Wakazono
  • Publication number: 20050126818
    Abstract: A multilayer wiring board (11) is provided which includes a core substrate (12) including a plurality of through-holes (15). The through-holes (15) include through-hole conductors (17) on the inner walls of corresponding penetration holes (16) of a diameter of 200 ?m or less. Interlayer insulating layers (31, 32) are disposed on opposite sides of the principal planes (13, 14) of the core substrate (12). Wiring layers (23, 24) are disposed on the surface of interlayer insulating layers (31, 32). The through-holes (15) are filled with a hardened filling material (18). Lid conductors (21, 22) close the openings of the through-holes (15). The value of linear expansion of the hardened filling material (18) is 1.2% or less in the temperature region from room temperature to the solder reflow temperature. The board has excellent connection reliability and exhibits little or no cracking or delamination in the lid conductor closing the openings of the through-holes and in the surrounding conductor area.
    Type: Application
    Filed: December 16, 2004
    Publication date: June 16, 2005
    Inventors: Toshifumi Kojima, Makoto Wakazono