Abstract: A method, system, and computer program product for on-chip control of thermal cycling in an integrated circuit (IC) are provided in the illustrative embodiments. A first circuit is configured on the IC for adjusting a first voltage being applied to a first part of the IC. A first temperature of the first part is measured at a first time. A determination is made that the first temperature is outside a temperature range defined by an upper temperature threshold and a lower temperature threshold. The first voltage is adjusted by reducing the first voltage when the first temperature exceeds the upper temperature threshold and by increasing the first voltage when the first temperature is below the lower temperature threshold, thereby causing the first temperature of the first part to attain a value within the temperature range.

Abstract: An approach is provided in which a master thermal controller utilizes a primary fan manager to control fans included in a computer system to cool various devices. When the master thermal controller determines that the primary fan manager is unresponsive, the master thermal controller transfers master thermal control to a backup thermal controller. The backup thermal controller creates fan control information based upon sensor information corresponding to the various devices, and sends the fan control information to a backup fan manager. In turn, the backup fan manager adjusts the speed of the fans according to the fan control information.

Abstract: A method, system, and computer program product for relating a data processing system with a power branch circuit are provided in the illustrative embodiments. Each signal in a set of signals is combined with a power signal to form a set of combination signals, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal. An amplitude of a corresponding signal in each combined signal in the set of combined signals is determined over a period. Using a discriminating logic, a determination is made whether the modulating signal is present in the power signal. Responsive to the discriminating logic producing an affirmative result, the data processing system is related with the power branch circuit.

Abstract: A method for relating a data processing system with a power branch circuit is provided in the illustrative embodiments. A second signal is combined with a power signal to form a combination signal, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal. The second signal is synchronized with the modulating signal in the power signal. A determination is made whether an amplitude of a frequency of the second signal is increasing in the combined signal over a period. Responsive to the determining being affirmative, the data processing system is related with the power branch circuit.

Abstract: A method for improving the performance of a digital circuit is provided in the illustrative embodiments. A real frequency of operation of the digital circuit is adjusted using a control loop in the digital circuit, the adjusting the real frequency being responsive to a change in an operating condition of the digital circuit. A measurement of a current drawn by the digital circuit is received from a voltage regulator supplying electrical power to the digital circuit. An over-current target current value is received. A voltage output from the voltage regulator to the digital circuit is adjusted such that the current drawn by the digital circuit does not exceed the over-current target current value.

Abstract: An approach is provided in which a master thermal controller utilizes a primary fan manager to control fans included in a computer system to cool various devices. When the master thermal controller determines that the primary fan manager is unresponsive, the master thermal controller transfers master thermal control to a backup thermal controller. The backup thermal controller creates fan control information based upon sensor information corresponding to the various devices, and sends the fan control information to a backup fan manager. In turn, the backup fan manager adjusts the speed of the fans according to the fan control information.

Abstract: A method, system, and computer program product for relating a data processing system with a power branch circuit are provided in the illustrative embodiments. Each signal in a set of signals is combined with a power signal to form a set of combination signals, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal. An amplitude of a corresponding signal in each combined signal in the set of combined signals is determined over a period. Using a discriminating logic, a determination is made whether the modulating signal is present in the power signal. Responsive to the discriminating logic producing an affirmative result, the data processing system is related with the power branch circuit.

Abstract: A method for dynamic power and performance calibration of a data processing system is provided in the illustrative embodiments. A synthesized program loaded in the data processing system is executed responsive to detecting an event in the data processing system. The synthesized program is configured to generate a set of data that is indicative of the data processing system's power-performance characteristics under varying conditions of operation. Using the set of data, a determination is made of a performance limit on an operation of the data processing system under present operating conditions of the data processing system. A parameter of the data processing system is calibrated to operate the data processing system within the performance limit.

Abstract: A method, system, and computer program product for dynamic power and performance calibration of a data processing system are provided in the illustrative embodiments. A synthesized program loaded in the data processing system is executed responsive to detecting an event in the data processing system. The synthesized program is configured to generate a set of data that is indicative of the data processing system's power-performance characteristics under varying conditions of operation. Using the set of data, a determination is made of a performance limit on an operation of the data processing system under present operating conditions of the data processing system. A parameter of the data processing system is calibrated to operate the data processing system within the performance limit.

Abstract: A system, and computer program product for relating a data processing system with a power branch circuit are provided in the illustrative embodiments. A second signal is combined with a power signal to form a combination signal, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal. The second signal is synchronized with the modulating signal in the power signal. A determination is made whether an amplitude of a frequency of the second signal is increasing in the combined signal over a period. Responsive to the determining being affirmative, the data processing system is related with the power branch circuit.

Abstract: A method for relating a data processing system with a power branch circuit is provided in the illustrative embodiments. A second signal is combined with a power signal to form a combination signal, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal. The second signal is synchronized with the modulating signal in the power signal. A determination is made whether an amplitude of a frequency of the second signal is increasing in the combined signal over a period. Responsive to the determining being affirmative, the data processing system is related with the power branch circuit.

Abstract: A method, system, and computer program product for improving the performance of a digital circuit are provided in the illustrative embodiments. A real frequency of operation of the digital circuit is adjusted using a control loop in the digital circuit, the adjusting the real frequency being responsive to a change in an operating condition of the digital circuit. A measurement of a current drawn by the digital circuit is received from a voltage regulator supplying electrical power to the digital circuit. An over-current target current value is received. A voltage output from the voltage regulator to the digital circuit is adjusted such that the current drawn by the digital circuit does not exceed the over-current target current value.

Abstract: A method for improving the performance of a digital circuit is provided in the illustrative embodiments. A real frequency of operation of the digital circuit is adjusted using a control loop in the digital circuit, the adjusting the real frequency being responsive to a change in an operating condition of the digital circuit. A measurement of a current drawn by the digital circuit is received from a voltage regulator supplying electrical power to the digital circuit. An over-current target current value is received. A voltage output from the voltage regulator to the digital circuit is adjusted such that the current drawn by the digital circuit does not exceed the over-current target current value.

Abstract: A method for dynamic power and performance calibration of a data processing system is provided in the illustrative embodiments. A synthesized program loaded in the data processing system is executed responsive to detecting an event in the data processing system. The synthesized program is configured to generate a set of data that is indicative of the data processing system's power-performance characteristics under varying conditions of operation. Using the set of data, a determination is made of a performance limit on an operation of the data processing system under present operating conditions of the data processing system. A parameter of the data processing system is calibrated to operate the data processing system within the performance limit.

Abstract: A method, system, and computer program product for on-chip control of thermal cycling in an integrated circuit (IC) are provided in the illustrative embodiments. A first circuit is configured on the IC for adjusting a first voltage being applied to a first part of the IC. A first temperature of the first part is measured at a first time. A determination is made that the first temperature is outside a temperature range defined by an upper temperature threshold and a lower temperature threshold. The first voltage is adjusted by reducing the first voltage when the first temperature exceeds the upper temperature threshold and by increasing the first voltage when the first temperature is below the lower temperature threshold, thereby causing the first temperature of the first part to attain a value within the temperature range.

Abstract: A method, system, and computer program product for dynamic power and performance calibration of a data processing system are provided in the illustrative embodiments. A synthesized program loaded in the data processing system is executed responsive to detecting an event in the data processing system. The synthesized program is configured to generate a set of data that is indicative of the data processing system's power-performance characteristics under varying conditions of operation. Using the set of data, a determination is made of a performance limit on an operation of the data processing system under present operating conditions of the data processing system. A parameter of the data processing system is calibrated to operate the data processing system within the performance limit.