Abstract: A degradation state estimating device includes: a Q calculator that receives inputs of the voltage, the current, and the battery temperature of a secondary battery, and calculates a discharge capacity; an OCV calculator that calculates an open-circuit voltage (OCV) value; and an OCV curve estimator that estimates at least one OCV curve. A state-of-charge estimating device includes an SOC estimator that estimates a state of charge (SOC) from the OCV curve and the open-circuit voltage (OCV) value estimated by the degradation state estimating device.

Abstract: The present disclosure provides an open-circuit voltage estimation device that estimates a high-precision open-circuit voltage value, a power storage apparatus, and an open-circuit voltage estimation method. The open-circuit voltage estimation device includes: an open-circuit voltage calculator that calculates an open-circuit voltage value of a secondary cell; a polarization voltage estimator that estimates a component having a relatively large time constant among polarization voltage components of the secondary cell; and an open-circuit voltage corrector that corrects the open-circuit voltage value calculated by the open-circuit voltage calculator with the component having the relatively large time constant estimated by the polarization voltage estimator.

Abstract: A degradation state estimating device includes: a Q calculator that receives inputs of the voltage, the current, and the battery temperature of a secondary battery, and calculates a discharge capacity; an OCV calculator that calculates an open-circuit voltage (OCV) value; and an OCV curve estimator that estimates at least one OCV curve. A state-of-charge estimating device includes an SOC estimator that estimates a state of charge (SOC) from the OCV curve and the open-circuit voltage (OCV) value estimated by the degradation state estimating device.

Abstract: According to an example embodiment of the present disclosure, a power storage module state estimation apparatus comprises a parameter calculator configured to calculate a parameter based on a current value of a power storage module, wherein the parameter includes at least one of a direction having a high frequency of current flowing in the power storage module, an average current value of the power storage module, and a charge and discharge capacity after the direction having the high frequency of current flowing in the power storage module is switched; and a hysteresis compensator configured to use the parameter to compensate an open circuit voltage of the power storage module.

Abstract: According to an example embodiment of the present disclosure, a power storage module state estimation apparatus comprises a parameter calculator configured to calculate a parameter based on a current value of a power storage module, wherein the parameter includes at least one of a direction having a high frequency of current flowing in the power storage module, an average current value of the power storage module, and a charge and discharge capacity after the direction having the high frequency of current flowing in the power storage module is switched; and a hysteresis compensator configured to use the parameter to compensate an open circuit voltage of the power storage module.

Abstract: The present disclosure provides an open-circuit voltage estimation device that estimates a high-precision open-circuit voltage value, a power storage apparatus, and an open-circuit voltage estimation method. The open-circuit voltage estimation device includes: an open-circuit voltage calculator that calculates an open-circuit voltage value of a secondary cell; a polarization voltage estimator that estimates a component having a relatively large time constant among polarization voltage components of the secondary cell; and an open-circuit voltage corrector that corrects the open-circuit voltage value calculated by the open-circuit voltage calculator with the component having the relatively large time constant estimated by the polarization voltage estimator.

Abstract: An audio processing apparatus includes an audio signal acquisition unit which acquires an audio signal of a musical piece, a feature value extraction unit which extracts a predetermined type of feature value from the audio signal acquired by the audio signal acquisition unit in time series, a change point detection unit which detects a change point in which the amount of change of the feature value extracted in time series by the feature value extraction unit is changed to be greater than a predetermined threshold value, a hook analysis unit which analyzes a hook place of the audio signal based on the feature value extracted by the feature value extraction unit in block units with the change point detected by the change point detection unit as a boundary, and a hook information output unit which outputs the hook place analyzed by the hook analysis unit as hook information.

Abstract: A method and apparatus for encoding audio data and a method and apparatus for decoding audio data, which can generate and decode, respectively, scalable lossless streams and which can shorten the time necessary to generate and decode lossless streams. A lossy-core encoder unit performs lossy compression on an input audio signal, generating a core stream. A simplified lossy-core decoding unit decodes only spectral signals of a specified band, e.g., a lower frequency band to generate a lossy decoded audio signal. A subtracter subtracts a lossy decoded audio signal from the input audio signal delayed to generate a residual signal. A rounding-off unit performs a process of rounding off the number of bits constituting the residual signal by eliminating the residual sign bit without loss of precision. A lossless-enhance encoder unit performs lossless compression on the residual signal to generate an enhanced stream.

Abstract: An audio processing apparatus includes an audio signal acquisition unit which acquires an audio signal of a musical piece, a feature value extraction unit which extracts a predetermined type of feature value from the audio signal acquired by the audio signal acquisition unit in time series, a change point detection unit which detects a change point in which the amount of change of the feature value extracted in time series by the feature value extraction unit is changed to be greater than a predetermined threshold value, a hook analysis unit which analyzes a hook place of the audio signal based on the feature value extracted by the feature value extraction unit in block units with the change point detected by the change point detection unit as a boundary, and a hook information output unit which outputs the hook place analyzed by the hook analysis unit as hook information.

Abstract: A reproducing apparatus includes a storage section, a judgment section, an analysis section, a classification section, an input section, and a reproduction section. The storage section stores a plurality of pieces of audio data. The judgment section judges, based on a length of each piece of audio data stored in the storage section, an analysis time interval for each piece of audio data. The analysis section analyzes the audio data in the analysis time interval judged by the judgment section. The classification section classifies the respective pieces of audio data into a plurality of predetermined classification items based on results of the analysis. The input section causes a user to select the classification item of the audio data to be reproduced. The reproduction section reproduces the audio data belonging to the classification item selected by the input section from a reproduction start point within the analysis time interval.

Abstract: A method and apparatus for encoding audio data and a method and apparatus for decoding audio data, which can generate and decode, respectively, scalable lossless streams and which can shorten the time necessary to generate and decode lossless streams. A lossy-core encoder unit performs lossy compression on an input audio signal, generating a core stream. A simplified lossy-core decoding unit decodes only spectral signals of a specified band, e.g., a lower frequency band to generate a lossy decoded audio signal. A subtracter subtracts a lossy decoded audio signal from the input audio signal delayed to generate a residual signal. A rounding-off unit performs a process of rounding off the number of bits constituting the residual signal. A lossless-enhance encoder unit performs lossless compression on the residual signal to generate an enhanced stream. A stream-combining unit combines the core stream and the enhanced stream to generate a scalable lossless stream.

Abstract: An arithmetic apparatus and an arithmetic method capable of executing arithmetic by reconfigurable hardware, shortening the processing time of arithmetic including conditional branches causing a heavy processing load and improving the processing speed even when conditional branches exist in a loop of performing repeating arithmetic processing, wherein arithmetic processing including conditional branches is divided to first processing of unconditional branches and second processing with conditional branches, the first processing of unconditional branches is assigned to reconfigurable arithmetic means, configuration information of hardware is generated based on the first processing, the first processing is executed by the reconfigured arithmetic means based on the configuration information, the second processing with conditional branches is assigned to a CPU or other arithmetic means, the assigned second processing with conditional branches is executed by the CPU, and a result of the processing is used for corr

Abstract: An arithmetic apparatus and an arithmetic method capable of executing arithmetic by reconfigurable hardware, shortening a processing time of arithmetic including conditional branches causing a heavy processing load and improving a processing speed even when conditional branches exist in a loop of performing repeating arithmetic processing, wherein arithmetic processing including conditional branches is divided to first processing of unconditional branches and second processing with conditional branches, the first processing of unconditional branches is assigned to reconfigurable arithmetic means, configuration information of hardware is generated based on the first processing, the first processing is executed by the reconfigured arithmetic means based on the configuration information, the second processing with conditional branches is assigned to a CPU or other arithmetic means, the assigned second processing with conditional branches is executed by the CPU, and a result of the processing is used for correcti