Abstract: One or more embodiments may include a method of making a semiconductor structure, comprising: forming a first opening partially through a semiconductor substrate; forming a first dielectric layer over a sidewall surface of the first opening; and forming a second opening partially through a semiconductor substrate, the second opening being below the first opening.

Abstract: A method for separating a plurality of dies is provided.

Abstract: A method for separating a plurality of dies is provided, the method including: defining one or more portions to be removed from a carrier including a plurality of dies by chemically changing the properties of the one or more portions to be removed located between the dies; performing a front-end-of-line FEOL process on at least one die to form at least one semiconductor device; and selectively removing the one or more portions of the carrier whose properties were chemically changed for separating the dies along the removed one or more portions.

Abstract: A method for separating semiconductor die includes forming a porous region on a semiconductor wafer and separating the die at the porous region using mechanical or other means.

Abstract: One or more embodiments relate to a method of making a semiconductor structure, comprising: forming a patterned metallic layer over a semiconductor substrate; forming a second layer over the patterned metallic layer; and etching the substrate.

Abstract: Various embodiments provide a device for processing a carrier, the device including: a carrier receiving portion configured to receive a carrier, the carrier including one or more planar regions and one or more edge regions; a processing portion including: a first electrode; a second electrode, wherein the second electrode is separated from the first electrode; and a dielectric material formed between the first electrode and the second electrode; and wherein the first electrode is configured to receive a first potential and the second electrode is configured to received a second potential to activate supplied gas between the first electrode and the second electrode; wherein the first electrode and the second electrode are arranged to direct more supplied activated gas to the one or more edge regions than to the one or more planar regions of the carrier.

Abstract: A method for fabricating a micro lens array is provided. The method includes forming a first lens material structure on a substrate. The first lens material structure includes a plurality of elevated portions. The elevated portions are separated by recesses. Moreover, the plurality of elevated portions have an average height of at least 3 micrometers. Furthermore, the method for fabricating a micro lens array includes depositing a dielectric material on the first lens material structure and the recesses to form a second lens material structure. The second lens material structure has an average thickness of at least 1 micrometer. Moreover, the first and second lens material structures form together the micro lens array.

Abstract: In one embodiment, a method of forming a semiconductor device includes forming islands by forming deep trenches within scribe lines of a substrate. The islands have a first notch disposed on sidewalls of the islands. A first electrode stack is formed over a top surface of the islands. The back surface of the substrate is thinned to separate the islands. A second electrode stack is formed over a back surface of the islands.

Abstract: According to various embodiments, a method for processing a semiconductor wafer or die is provided including supplying particles to a plasma such that the particles are activated by the plasma and spraying the activated particles on the semiconductor wafer or die to generate a particle layer on the semiconductor wafer or die.

Abstract: In various embodiments, a method of patterning a substrate may include: forming an auxiliary layer on or above a substrate and forming a plasma etch mask layer on or above the auxiliary layer, wherein the auxiliary layer is configured such that it may be removed from the substrate more easily than the plasma etch mask layer; patterning the plasma etch mask layer and the auxiliary layer such that at least a portion of the substrate is exposed; patterning the substrate by means of a plasma etch process using the patterned plasma etch mask layer as a plasma etch mask.

Abstract: According to various embodiments, a method for processing a semiconductor wafer or die is provided including supplying particles to a plasma such that the particles are activated by the plasma and spraying the activated particles on the semiconductor wafer or die to generate a particle layer on the semiconductor wafer or die.

Abstract: In one embodiment, a semiconductor device includes a glass substrate, a semiconductor substrate disposed on the glass substrate, and a magnetic sensor disposed within and/or over the semiconductor substrate.

Abstract: An MIM capacitor includes a first capacitor electrode, which is formed in the surface of a first intermediate dielectric, a second intermediate dielectric, which is formed on the first intermediate dielectric and has an opening that exposes the first capacitor electrode, and a first electrically conducting diffusion barrier layer, which is formed on the surface of the exposed first capacitor electrode. On the diffusion barrier layer and on the side walls of the opening there is also formed a capacitor dielectric and a second capacitor electrode on top.

Abstract: An integrated circuit device includes a substrate with a first layer situated on the substrate. The first layer defines a first opening with a cover layer deposited on the first layer and coating a sidewall portion of the first opening. A second layer is situated on the cover layer. The second layer defines a second opening extending through the second layer and through the cover layer to connect the first and second openings.

Abstract: An MIM capacitor includes a first capacitor electrode, which is formed in the surface of a first intermediate dielectric, a second intermediate dielectric, which is formed on the first intermediate dielectric and has an opening that exposes the first capacitor electrode, and a first electrically conducting diffusion barrier layer, which is formed on the surface of the exposed first capacitor electrode. On the diffusion barrier layer and on the side walls of the opening there is also formed a capacitor dielectric and a second capacitor electrode on top.

Abstract: In one embodiment, a method of forming a semiconductor device includes forming islands by forming deep trenches within scribe lines of a substrate. The islands have a first notch disposed on sidewalls of the islands. A first electrode stack is formed over a top surface of the islands. The back surface of the substrate is thinned to separate the islands. A second electrode stack is formed over a back surface of the islands.

Abstract: An interconnect arrangement and fabrication method are described. The interconnect arrangement includes an electrically conductive mount substrate, a dielectric layer formed on the mount substrate, and an electrically conductive interconnect formed on the dielectric layer. At least a portion of the dielectric layer under the interconnect contains a cavity. To fabricate the interconnect arrangement, a sacrificial layer is formed on the mount substrate and the interconnect layer is formed on the sacrificial layer. The interconnect layer and the sacrificial layer are structured to produce a structured interconnect on the structured sacrificial layer. A porous dielectric layer is formed on a surface of the mount substrate and of the structured interconnect as well as the sacrificial layer. The sacrificial layer is then removed to form the cavity under the interconnect.

Abstract: In one embodiment an apparatus for input of control signals is for moving an object in three spatial directions and three rotational directions and for connection to a computational unit with a display which displays at least partial areas of the object. The apparatus comprises a carrier element, an input element which is moveable with respect to the carrier element for input of the control signals, and an actuator, which is arranged at the carrier element. The actuator is designed as a rotatable or slideable element in order to detect further inputs of a user and extends at least partially around the input element.

Abstract: The invention relates to an apparatus for input of movements and/or registration of forces, comprising at least one light source, at least one position sensitive device (PSD) and at least one diaphragm, wherein at least one of these three elements is moveable with respect to the two other elements. The light source is arranged at a mounting so that light from the light source is emitted through an opening in the mounting and through the at least one diaphragm onto the at least one PSD.

Abstract: An integrated circuit device includes a substrate with a first layer situated on the substrate. The first layer defines a first opening with a cover layer deposited on the first layer and coating a sidewall portion of the first opening. A second layer is situated on the cover layer. The second layer defines a second opening extending through the second layer and through the cover layer to connect the first and second openings.