Abstract: A method comprising measuring a number of gamma-ray counts in a gamma-ray sensitive detector (60) that is placed outside a biological shield (10) near a primary cooling circuit (30) of a nuclear power plant, and determining the thermal power of the nuclear power plant based on the number of gamma-ray counts measured in the gamma-ray sensitive detector (60).

Abstract: The present invention relates to rear-projection film with “day/night” effect comprising at least two layers, where the film comprises at least one grey layer comprising at least one thermoplastic with transmittance of from 10% to 70% in the visible wavelength range and at least one layer comprising at least one thermoplastic and scattering particles, and also to the use of the said films as rear-projection areas in the vehicle interior sector.

Abstract: The present invention relates to rear-projection film with “day/night” effect comprising at least two layers, where the film comprises at least one grey layer comprising at least one thermoplastic with transmittance of from 10% to 70% in the visible wavelength range and at least one layer comprising at least one thermoplastic and scattering particles, and also to the use of the said films as rear-projection areas in the vehicle interior sector.

Abstract: The present invention relates to the use of a plastic film as a printable medium in colour laser printing, to special plastic films for use in colour laser printing, and to their application in the production of security documents or valuable documents and plastic mouldings.

Abstract: A phase locked loop is disclosed having a phase detector and a controllable oscillator coupled to the detector. A frequency divider is also included in a feedback path of the phase locked loop. The phase locked loop further comprises an evaluation means that facilitates an evaluation of a jitter of the phase locked loop. This allows an on-chip evaluation of the jitter of a phase locked loop to be performed.

Abstract: A charge pump circuit has a charge pump having at least two switched current sources arranged in series. The difference between the currents produced in the two switched current sources contributes to the output current from the charge pump. At least one of the two current sources is controlled by means of a control signal. A control circuit produces the control signal for the at least one controlled current source such that the currents produced in the two current sources are regulated to the same value.

Abstract: A phase-locked loop is described and has a phase detector that provides at its output per clock cycle a current pulse whose pulse duration is a measure of a phase difference between an input signal and an output signal of the phase-locked loop. A loop filter is connected downstream of the phase detector. The loop filter has a converter device, at least one controllable switching device and at least two switchable capacitive elements for storing a current pulse. In which case the converter device, the switching device and the capacitive elements can be connected up in such a way that the converter device provides a proportional current from a current pulse coupled into at least one of the capacitive elements. An amplitude of the proportional current is constant over the entire length of a clock period. An oscillator is connected downstream of the loop filter, into which oscillator the proportional current can be coupled.

Abstract: A charge pump circuit has a charge pump having at least two switched current sources arranged in series. The difference between the currents produced in the two switched current sources contributes to the output current from the charge pump. At least one of the two current sources is controlled by means of a control signal. A control circuit produces the control signal for the at least one controlled current source such that the currents produced in the two current sources are regulated to the same value.

Abstract: A phase locked loop is disclosed having a phase detector and a controllable oscillator coupled to the detector. A frequency divider is also included in a feedback path of the phase locked loop. The phase locked loop further comprises an evaluation means that facilitates an evaluation of a jitter of the phase locked loop. This allows an on-chip evaluation of the jitter of a phase locked loop to be performed.

Abstract: A phase-locked loop is described and has a phase detector that provides at its output per clock cycle a current pulse whose pulse duration is a measure of a phase difference between an input signal and an output signal of the phase-locked loop. A loop filter is connected downstream of the phase detector. The loop filter has a converter device, at least one controllable switching device and at least two switchable capacitive elements for storing a current pulse. In which case the converter device, the switching device and the capacitive elements can be connected up in such a way that the converter device provides a proportional current from a current pulse coupled into at least one of the capacitive elements. An amplitude of the proportional current is constant over the entire length of a clock period. An oscillator is connected downstream of the loop filter, into which oscillator the proportional current can be coupled.

Abstract: A circuit configuration includes a final control element being adjustable as a function of a control current, wherein the function is subject to certain fluctuations and variations. A constant current source supplies an output current being equally subject to the certain fluctuations and variations. A multiplier is connected between the constant current source and the final control element, for varying the current output by the constant current source by a factor being dependent on a control signal, and for delivering the current output by the constant current source to the final control element as the control current.

Abstract: A method for transmitting two independent types of information over a transmission path having a transmitter side and a receiver side, a storage unit and a multiplexer device including sampling and time-compressing a first information type on the transmitter side by means of a fast clock for generating time gaps, and transmitting the first information type on the transmitting path, transmitting a second information type within the time gaps over the transmission path, the first and second information type is read on the receiver side and recovered by time expansion using a slow clock. The first signal is interim-stored on the receiver side under the control of the slow clock and by generation of the time gap, under control of the fast clock frequency.

Abstract: A method and arrangement for transmitting data in a data loop comprising at least two stations and at least one of which is an overriding master station in which a transmission frame for the data to be transmitted is generated for transmission through all successive stations. Each transmission frame is generated with a predetermined constant number of clock cycles and contains exclusively the data to be transmitted from one station to one or more others and is devoid of protocol signals, especially devoid of address signals. Each transmission frame is immediately followed by the beginning of a further identical transmission frame containing the next data to be transmitted, if any. Time slots, preferably mutually equally great time slots, in the transmission frame are permanently or temporally modifiably allocated to the individual stations for information or data transfer before entering each transmission frame into the data loop.

Abstract: An appartus for generating a multi-frequency signal includes a D/A converter, two converter circuits connected to the D/A converter for determining a respective connecting instant, two controlled waveform counters each being connected to a respective one of the converter circuits, a D/A cycle control connected to the converter circuits for monitoring the converter circuits, a sample-and-hold circuit having divider capacitors and being connected to the D/A converter, and holding capacitors connected to the sample-and-hold circuit.