Abstract: A search pattern is generated based on an input search word comprising a first sequence of bits. The search pattern comprises a first set of signals representing the input search word and a second set of signals representing a second sequence of bits comprising an inverse of the first sequence of bits. The search pattern is provided as input to search lines of a content addressable memory (CAM) block. The search pattern causes at least one string in the CAM block to be conductive and provide a signal to a page buffer connected to the string in response to the input search word matching a data entry stored on the string. A location of the data entry is determined based on data read from the page buffer and the location is output.

Abstract: A programmable sense amplifier delay (PSAD) circuit that is matched to the response of the memory array due to temperature and voltage supply Vcc. The circuit includes an inverter, a pull-up transistor, a pull-down transistor of the type of the cells of the memory array and a plurality of capacitors. The inverter responds to a predetermined voltage drop between the voltage level of the voltage source and the voltage on the input line. The pull-up transistor is connected between the voltage source Vcc and the input line and is activatable during a pre-charge phase of the memory array to raise the voltage level of the input line towards the voltage source. The pull-down transistor is connected between the input line and a ground source and is activatable after the pre-charge phase to discharge the voltage level of the input line. The capacitors are selectively connected in parallel to the pull-down transistor and define the speed at which the pull-down transistor discharges the input line.

Abstract: A row decoder for controlling a plurality of selectable word-lines has one control line per block of N word-lines, K select lines, at least one disable line and one word-line driver per word-line. Each control line is activatable during a charge period and during an initial portion of a discharge period. Each select line is selectably high during the charge period. The disable line is active during the discharge period. Each driver includes an access transistor and a discharge transistor. The access transistor is located at one end of its word-line and the discharge transistor is connected at the other end. The access transistor is controlled by one control line and is connected between one select line and the word-line. The discharge transistor is controlled by one disable signal and is connected between the word-line and a ground supply.

Abstract: A sense amplifier includes: a pull-down device which contains a reference cell which is structurally identical to the PLD cells being sensed; and a pull-up device connected to form a current mirror which causes a saturation current of the pull-up device to be zero or greater than the current through the sensed cell. The pull-down device has a saturation current which tracks the current through the sensed cell. When current flows through the sensed cell, saturation current through the pull-up device exceeds the saturation current through the pull-down device, and an output node is pulled up. When no current flows through the sensed cell, no current flow through the pull-up device, and the pull-down device pulls the output node down. As a result, the sense amplifier exhibits a variable trip point which tracks variations cause by changes in device fabrication process, temperature, and power supply voltage.