Abstract: An electronic device can include a power system including a battery and one or more processors programmed to: detect that the electronic device has been connected to a power source, predict using prior usage data of the electronic device whether battery usage between an expected time of disconnection from the power source and a next expected time of connection to the power source exceeds a threshold, and if the predicted battery usage between an expected time of disconnection from the power source and a next expected time of connection to the power source does not exceed the threshold, charge the battery to a state of charge less than the full state of charge of the battery.

Abstract: Various example embodiments of the inventive concepts include a SRAM apparatus including a left memory array and right memory array, each of the left memory array and the right memory array including a left memory array and a right memory array, each comprising a plurality of columns, the plurality of columns in each of the left memory array and the right memory array divided into a plurality of segments, and each of the segments comprising a plurality of memory bit cells, and central driver circuitry comprising a plurality of driver devices, each of the plurality of driver devices communicatively connected to a corresponding segment of the plurality of segments through a corresponding metal control line of a plurality of metal control lines, the central driver circuitry configured to route at least one array signal to at least one segment of the plurality of segments.

Abstract: Aspects of the subject technology relate to power consuming processes of electronic devices. For example, an electronic device may create, initiate, and/or modify a power consuming process of the electronic device, based in part on user power consumption information that indicates a typical amount of power consumed by a user of the electronic device. The electronic device may recommend increases in power consumption for low power consumption users and/or decreases in power consumption for high power consumption users. A power consumption process may include a visual arrangement of graphical elements that each display periodically, occasionally, and/or continuously updated information from the application, when a full user interface of the application is not displayed.

Abstract: The present invention discloses a wordline driver circuit for a random-access memory (RAM), which can reduce leakage during power down mode. The circuit includes a pre-driver stage on header and footer. The pre-driver stage includes a strap buffer defining a header and comprising a first switch connecting a first set of wordlines to a first voltage. The pre-driver stage includes an input-output buffer defining a footer and comprising a second switch connecting a second set of wordlines to a second voltage. In the pre-driver stage, the strap buffer further includes a third switch connecting the second set of wordlines to the first voltage and a fourth switch connecting the first set of wordlines to the second voltage.

Abstract: Systems and methods for sensitive data management are disclosed. A voice-enabled device may generate audio data representing a request from a user utterance. A remote system may perform speech-processing operations, including obtaining responsive text data from a third-party application. In examples, a sensitivity designation may be received from the third-party application, which may cause the remote system to encrypt the responsive text data, redact the text data, and/or remove the text data from the remote system after the response is provided to the voice-enabled device.

Abstract: A memory device includes at least one bitcell; read circuitry coupled to the at least one bitcell; and screening circuitry coupled to the read circuitry, wherein the screening circuitry includes a master slave flip-flop configured to store an output of the at least one bitcell during a read operation of the memory device, wherein the master slave flip-flop includes a master latch and a slave latch; and a DOUT window controller coupled to the master slave flip-flop and configured to generate and control a master clock signal for the master latch to determine if the at least one bitcell is a weak bitcell; and generate and control a slave clock signal for the slave latch to enable toggling of the output of the at least one bitcell during a transparent window between the master clock signal and the slave clock signal.

Abstract: Aspects of the subject technology relate to power consuming processes of electronic devices. For example, an electronic device may create, initiate, and/or modify a power consuming process of the electronic device, based in part on user power consumption information that indicates a typical amount of power consumed by a user of the electronic device. The electronic device may recommend increases in power consumption for low power consumption users and/or decreases in power consumption for high power consumption users. A power consumption process may include a visual arrangement of graphical elements that each display periodically, occasionally, and/or continuously updated information from the application, when a full user interface of the application is not displayed.

Abstract: Aspects of the subject technology relate to power consuming processes of electronic devices. For example, an electronic device may create, initiate, and/or modify a power consuming process of the electronic device, based in part on user power consumption information that indicates a typical amount of power consumed by a user of the electronic device. The electronic device may recommend increases in power consumption for low power consumption users and/or decreases in power consumption for high power consumption users. A power consumption process may include a visual arrangement of graphical elements that each display periodically, occasionally, and/or continuously updated information from the application, when a full user interface of the application is not displayed.

Abstract: The present technology provides a system, method and computer-readable medium for configuration pattern recognition and inference, directed to a device with an existing configuration, through an extensible policy framework. The policy framework uses a mixture of python template logic and CLI micro-templates as a mask to infer the intent behind an existing device configuration in a bottom-up learning inference process. Unique values for device/network identifiers and addresses as well as other resources are extracted and accounted for. The consistency of devices within the fabric is checked based on the specific policies built into the extensible framework definition. Any inconsistencies found are flagged for user correction or automatically remedied by a network controller. This dynamic configuration pattern recognition ability allows a fabric to grow without being destroyed and re-created, thus new devices with existing configurations may be added and automatically configured to grow a Brownfield fabric.

Abstract: Certain embodiments disclosed herein provide application-specific launch optimization. Aspects of the present disclosure include one or more cost functions for each application, where each cost function corresponds to a likelihood that a particular application should be placed into a particular pre-activation state. For each of the inactive applications, a respective one of the pre-activation states is selected based on comparing cost values obtained by evaluating the cost functions. Each of the inactive applications can be moved to or maintained in the respectively-selected pre-activation state to more efficiently provide an expedited application launch experience for a user.

Abstract: The present invention discloses a wordline driver circuit for a random-access memory (RAM), which can reduce leakage during power down mode. The circuit includes a pre-driver stage on header and footer. The pre-driver stage includes a strap buffer defining a header and comprising a first switch connecting a first set of wordlines to a first voltage. The pre-driver stage includes an input-output buffer defining a footer and comprising a second switch connecting a second set of wordlines to a second voltage. In the pre-driver stage, the strap buffer further includes a third switch connecting the second set of wordlines to the first voltage and a fourth switch connecting the first set of wordlines to the second voltage.

Abstract: The present technology provides a system, method and computer-readable medium for configuration pattern recognition and inference, directed to a device with an existing configuration, through an extensible policy framework. The policy framework uses a mixture of python template logic and CLI micro-templates as a mask to infer the intent behind an existing device configuration in a bottom-up learning inference process. Unique values for device/network identifiers and addresses as well as other resources are extracted and accounted for. The consistency of devices within the fabric is checked based on the specific policies built into the extensible framework definition. Any inconsistencies found are flagged for user correction or automatically remedied by a network controller. This dynamic configuration pattern recognition ability allows a fabric to grow without being destroyed and re-created, thus new devices with existing configurations may be added and automatically configured to grow a Brownfield fabric.

Abstract: The disclosed technology relates to a load balancing system. A load balancing system is configured to receive health monitoring metrics, at a controller, from a plurality of leaf switches. The load balancing system is further configured to determine, based on the health monitoring metrics, that a server has failed and modify a load balancing configuration for the network fabric. The load balancing system is further configured to transmit the load balancing configuration to each leaf switch in the network fabric and update the tables in each leaf switch to reflect an available server.

Abstract: The present technology provides a system, method and computer-readable medium for configuration pattern recognition and inference, directed to a device with an existing configuration, through an extensible policy framework. The policy framework uses a mixture of python template logic and CLI micro-templates as a mask to infer the intent behind an existing device configuration in a bottom-up learning inference process. Unique values for device/network identifiers and addresses as well as other resources are extracted and accounted for. The consistency of devices within the fabric is checked based on the specific policies built into the extensible framework definition. Any inconsistencies found are flagged for user correction or automatically remedied by a network controller. This dynamic configuration pattern recognition ability allows a fabric to grow without being destroyed and re-created, thus new devices with existing configurations may be added and automatically configured to grow a Brownfield fabric.

Abstract: Embodiments herein provide a Static Random-Access Memory (SRAM) system with a delay tuning circuitry and a delay control circuitry and a method thereof. Delay tuning circuitry in the SRAM system may provide a tuning of reset time in the generation of an internal clock by introducing a delay. The delay is introduced according to a process state of periphery circuitry in the SRAM. A delay control circuitry provides a control over delay in reset time of the internal clock by varying a discharge rate for each of a Dummy Bit Line (DBL) circuitry and Complementary Bit Line Circuitry (CDBL), by connecting a stack of NMOS transistors over discharge NMOS transistors.

Abstract: Provided are apparatus and methods for compensating fabrication process variation of on-chip component(s) in shared memory bank. The method includes tracking a flip voltage level and tracking a discharge leakage current to disconnect a keeper circuit from the local read bit-line. The method includes controlling a read current and the discharge leakage current based on determining at least one of fast transistor and slow transistor associated with the at least one the keeper circuit and a bit-cell.

Abstract: Embodiments herein provide a Static Random-Access Memory (SRAM) system with a delay tuning circuitry and a delay control circuitry and a method thereof. Delay tuning circuitry in the SRAM system may provide a tuning of reset time in the generation of an internal clock by introducing a delay. The delay is introduced according to a process state of periphery circuitry in the SRAM. A delay control circuitry provides a control over delay in reset time of the internal clock by varying a discharge rate for each of a Dummy Bit Line (DBL) circuitry and Complementary Bit Line Circuitry (CDBL), by connecting a stack of NMOS transistors over discharge NMOS transistors.

Abstract: Provided are apparatus and methods for compensating fabrication process variation of on-chip component(s) in shared memory bank. The method includes tracking a flip voltage level and tracking a discharge leakage current to disconnect a keeper circuit from the local read bit-line. The method includes controlling a read current and the discharge leakage current based on determining at least one of fast transistor and slow transistor associated with the at least one the keeper circuit and a bit-cell.

Abstract: A switch/switching fabric is configured to load balance traffic. The switch fabric includes a plurality of switches. A packet is received at a first switch of the plurality of switches. The first switch load balances the packet to a particular entity among a plurality of entities. Each of the entities is connected to one of the plurality of switches. The first switch determines a particular switch of the plurality of switches to which the packet should be directed, the particular entity being connected to the particular switch of the plurality of switches. The particular switch receives the packet, and determines which interface of the particular switch to direct the packet to the particular entity. The plurality of entities include servers and network appliances as physical devices or virtual machines.

Abstract: The disclosed technology relates to a load balancing system. A load balancing system is configured to receive health monitoring metrics, at a controller, from a plurality of leaf switches. The load balancing system is further configured to determine, based on the health monitoring metrics, that a server has failed and modify a load balancing configuration for the network fabric. The load balancing system is further configured to transmit the load balancing configuration to each leaf switch in the network fabric and update the tables in each leaf switch to reflect an available server.