Abstract: A current bias, current sense magneto-resistive preamplifier for a hard disk drive and related methods preferably includes an MR sensor responsive to a current bias for sensing a change in magnetic data flux and responsively providing a change in electrical resistance. A preamplifying circuit is preferably connected to the MR sensor for providing the current bias thereto and for amplifying a detected change in electrical resistance. The preamplifying circuit includes a sensor biasing circuit for providing the current bias to the MR sensor and an amplifying output circuit for providing an amplified output signal representative of the detected change in current bias to the MR sensor. The sensor biasing circuit preferably includes a current source, a first amplifying circuit connected to the MR sensor for sensing the change in electrical resistance therefrom, and a second amplifying circuit having a first input connected to the first amplifying circuit and a second input connected to the current source.

Abstract: An adaptive cable equalizer is provided with a simple architecture, wherein a single control structure: controls the adaptation of the filter for compensating for cable length while simultaneously compensating for process and temperature variations; optimizes the SNR at any cable length by controlling biasing current sources; and uses a two-stage architecture which eliminates start-up problems and optimizes output levels to obtain optimal dc restoration while simultaneously allowing for independent optimization of the output levels of the recovered data in accordance with other requirements as desired. An analog adaptive equalizing filter is used for accurately synthesizing the inverse transfer function of cables of variable lengths. Data rates up to and beyond 400 Mbps are supported and the adaptive behavior automatically compensates for different cable lengths as well as process variations (with respect to the process(es) used for fabricating the equalizer in a monolithic form) and temperature variations.

Abstract: A transconductor circuit has first and second half cascode mirror circuits. Each half cascode mirror circuit has a cascode transistor, an active transistor, a base current compensating transistor, and a current source connected at one side to a supply voltage and at another side to the cascode transistor. The cascode and active transistors are connected in series between the current source and a first reference potential node. The base current compensating transistor is connected between the supply voltage and the base of the active transistor, and has its base connected between the current source and the cascode transistor. The bases of the cascode transistors of the first and second half cascode mirror circuits are connected to a second reference potential. First and second output mirror circuits are connected to mirror a current in a respective active transistor of the first and second half cascode mirror circuits.

Abstract: A PTAT current source has first and second current mirror circuits, each comprising a cascode transistor, an output transistor in series with the cascode transistor, and a base current compensating transistor having a control element connected to the cascode transistor on a side away from the output transistor, and a current flow path element connected to a current control element of the output transistor, the cascode transistors of the first and second current mirror circuits having differently sized emitter areas. A resistor is connected between the cascode transistors of the first and second current mirror circuits across which a differential current is developed. An output circuit develops a current in the output transistor of the second current mirror circuit. In one embodiment, a third mirror circuit is provided, to cancel a portion of an emitter current flowing in the output transistor of the second current mirror circuit.

Abstract: A logarithmic amplifier has first and second mirror circuits, each having active transistors interconnected by a resistor. The current input is applied within one of the mirror circuits so that a logarithmic function thereof is generated for output by an output current mirror circuit. The mirror circuits are similarly constructed with an active transistor, a cascode transistor, and a base current compensating transistor. The cascode and active transistors are connected in series between an input node and a reference potential, or ground, with the base current compensating transistor connected between a supply voltage source and a base of the active transistor. The base of the base current compensating transistor is connected to the reference current input node. Through modification of the basic circuit by injection of an input current to the active transistor with respect to the reference potential, an exponential converter is presented.

Abstract: A wideband current multiplying divider circuit that produces an output current of any ratio to the input current has a first bipolar transistor and a first reference current source connected in series between a supply voltage and ground. A second bipolar transistor and a second reference current source are also connected in series between the supply voltage and around. A summation current source is connected at one side to ground and at the other side to a divided current path. A first resistor is connected in series with the station current source between a base of the first bipolar transistor and ground, and through which an input current can be connected to flow. A second resistor is connected in series with the summation current source between a base of the second bipolar transistor and ground, and through which an output current can be connected to flow.

Abstract: A current source for producing a current that is proportional to absolute temperature (i.e., "PTAT") is disclosed. The current source is based upon a circuit having a pair of current mirrors, one based upon MOS transistors and the other based upon bipolar transistors, where each of two legs in the current source include the series connection of one of the MOS transistors with one of the bipolar transistors. Further included in the disclosed circuit is a series connection of three MOS startup transistors, useful in starting up the current source in a non-critical manner. A startup current source, sourcing a non-critical startup current, turns on one of the MOS startup transistors that is connected in current mirror fashion with the MOS transistor current mirror, turning on both current mirrors. As the output current increases, the current through the MOS startup transistors also increases, until equilibrium is achieved.

Abstract: A digital-to-analog converter has a bias block that provides first and second voltage outputs, and a bit cell having a switch for selectively connecting either a first or a second summing node to a current flow path depending upon the state of a binary input signal. An output bipolar transistor and a current source are connected in series between a supply voltage and a reference potential. A first MOS transistor is connected in the current flow path with its gate connected to the bipolar transistor. A base current compensating second MOS transistor is connected between the supply voltage and a base of the output bipolar transistor with its gate connected to the first voltage output of the amplifier. A resistor is connected between the base of the output bipolar transistor and the second voltage output of the amplifier. When a plurality of bit stages are provided, the resistor of each of the plurality of bit cells is sized according to a position of its associated cell in the bit order.

Abstract: A cascode mirror circuit, referred to as a "half-cascode mirror", or "HCM" has first (cascode), second (active), and third (base control) transistors. The cascode and active transistors are connected in series at a first node, the series being connected between a second node and a reference potential. The cascode transistors has its base connected to a second reference voltage. The base control transistor is connected between the supply voltage and a base of the active transistors, with its base connected between the first reference current source and the cascode transistor. Depending upon the selection of input and output signal locations, the circuit can perform various functions, including the generation of an output circuit that varies linearly, logarithmically, or exponentially with an input current, and the generation of an output voltage that varies linearly with the input current.

Abstract: A power amplifier has a signal input stage to which an input signal is applied to produce an input stage output. An input signal amplifier is connected to receive the input signal to produce an amplified input signal from an active device at an output of the input signal amplifier. A push-pull signal output stage has first and second transistors. The first transistor has a current path connected between a supply voltage and an output node, and the second transistor has a current path connected between a reference voltage and the output node. The amplifier output provides variable drive current directly to a base of the first transistor, thereby enabling increased drive current to be realized. The power amplifier also includes a common mode biasing circuit connected to bias the first and second transistors for class AB operation, and the input stage output provides a signal base drive current to the first transistor separate from the common mode biasing circuit.

Abstract: An operational amplifier input stage has at least two positive input transistors and one negative input transistor for providing more accurate and efficient limiting or rectification in limiter and rectifier circuits. The two positive input transistors are connected in parallel having a common drain connected to one side of a load and the negative input transistor's drain is connected to the other side of the load. The sources of all transistors are connected to a common node which is connected to a constant current source. This arrangement enables simplistic high accuracy limiting and rectifier circuits, having a reduced number of extrinsic components, thereby reducing unwanted speed limitations, to be realized. The operational amplifier input stage is also very useful in low supply circuit applications.

Abstract: A transistor circuit is provided which generates a collector current through an output transistor which is equal to the base current of a selected transistor in the circuit. This generated base current can be utilized in a variety of applications. Once such application is its use in an accurate cascode current mirror having an output current which is a predetermined multiple of an input current.

Abstract: A differential input stage for an operational transconductance amplifier is provided with complementary input transistor pairs. For each pair, a diode dummy load is provided. When the common mode input signal is near the positive or negative supply voltage, one of the pairs turns off. The diode loads act to increase the current through the other pair when this occurs. This results in the provision of a constant transconductance over the entire common mode input range.

Abstract: An operational amplifier having a differential signal input and an output has an input stage comprising a differential amplifier having a differential signal input and a differential signal output. The differential amplifier includes a first pair of transistors of opposite conductivity type having control elements connected to receive one side of the differential signal input, and second and third pairs of transistors of opposite conductivity type having control elements connected to receive another side of the differential signal input. The differential output of the differential amplifier is developed by outputs of the second and third pairs of transistors. A high-swing output section is connected to receive the differential signal output directly from the input stage.

Abstract: An amplifier having a rail-to-rail common mode input range that can be used in low voltage power supply applications includes differential input and output stages, the output stage having first and second current paths. First and second output duplicating circuits are respectively connected in parallel with the first and second current paths in the differential output stage to duplicate the differential output. A circuit for detecting a common-mode voltage difference is provided between nodes of the first and second output duplicating circuits for developing a current related to the common-mode voltage difference. A current mirror circuit is connected to receive the current related to the common-mode voltage difference for controlling the current in the first and second current paths in the differential output stage.

Abstract: A two-stage class-AB operational amplifier, that can be implemented either with bipolar or MOS transistors, includes a differential input circuit adapted to receive a differential input signal to produce an amplified differential output signal for application to first and second nodes. The differential input stage has a common-mode control circuit that produces first and second common-mode control voltages on the first and second nodes. The common-mode control voltages are combined with the amplified differential output signal on the first and second nodes to produce a first stage differential output signal. A high-swing output stage is connected to receive the first stage differential output signal. First and second current mirrors each have a mirror transistor to mirror an output current produced in response to the differential input signals on respective lines including the first and second nodes. The common-mode control circuit is in series with mirror transistors of the first and second current mirrors.