Patents by Inventor Marc Hartranft
Marc Hartranft has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7573695Abstract: An architecture and method are provided for preventing snapdown in a voltage controlled MEMS device having a movable actuator with an actuator electrode coupled to a high voltage power supply (HVPS) through a drive circuit, the movable actuator suspended over a cavity electrode formed on a substrate and coupled to a common backplane supply (VssC). Generally, the circuit includes a number of first diodes coupled between the HVPS and the actuator electrode and/or the cavity electrode to provide a forward-biased path to transfer a positive charge to the HVPS when the accumulated charge exceeds a predetermined threshold. Preferably, the drive circuit further includes second diodes to provide a low impedance path to transfer a positives charge from the actuator electrode and/or the cavity electrode to a substrate ground when the accumulated charge results in or exceeds a predetermined threshold voltage. Other embodiments are also disclosed.Type: GrantFiled: October 26, 2007Date of Patent: August 11, 2009Assignee: Silicon Light Machines CorporationInventors: Andrew Walker, Marc Hartranft, Michael J. Duewake, Gerald Murphy, Kevin Gallagher
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Patent number: 7529017Abstract: A circuit and method are provided for preventing snapdown in a voltage controlled Micro-Electromechanical System device having a movable actuator with an actuator electrode coupled to a first potential, the actuator suspended over a cavity electrode coupled to a second potential. Generally, the circuit includes an in-circuit conductive path between the actuator electrode and the cavity electrode, the conductive path configured to transfer charge therebetween when a voltage between the first and second potential exceeds a predetermined threshold voltage. In one embodiment the conductive path comprises an ESD clamp coupled between the actuator electrode and the cavity electrode. Other embodiments are also disclosed.Type: GrantFiled: June 7, 2006Date of Patent: May 5, 2009Assignee: Silicon Light Machines CorporationInventors: Andrew Walker, Marc Hartranft, Michael J. Dueweke
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Patent number: 7184253Abstract: A circuit (100) can include a first section (102) that can provide a designated function within an integrated circuit device that can be altered due to current injection at a node (106). A mirror section (104) can mirror the effects of current injection on one or more devices within first section (102) and generate an output indication INJ_EFF representing such effects. In one very particular arrangement, detection of an injected current can be used to prevent false triggering of a switched electrostatic discharge (ESD) current path.Type: GrantFiled: January 13, 2006Date of Patent: February 27, 2007Assignee: Cypress Semiconductor CorporationInventors: Marc Hartranft, Eric Mann, Dan Zupcau
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Patent number: 7129722Abstract: The quality and reliability of electro-optical modules can be improved, for instance, through improved testing and burn-in of an electro-optical sub-assembly. Reliability can also be enhanced through better methods of constructing an electro-optical module. By arranging both an electrical interface and an optical interface on a sub-assembly, for instance, testing can be performed on both interfaces in a single testing process. Burning-in an electro-optical sub-assembly can also improve the reliability of the module by identifying defects. A method of forming an electro-optical module can provide improved reliability by testing and/or burning-in an electro-optical sub-assembly before assembling the module.Type: GrantFiled: October 9, 2002Date of Patent: October 31, 2006Assignee: Cypress Semiconductor Corp.Inventors: Brenor Brophy, Marc Hartranft, Syed Tariq Shafaat, Jeff Hall
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Patent number: 6956995Abstract: An arrangement for optical communication comprises an optical coupler, an opto-electronic board, and an optical fiber. The optical fiber comprises a first refraction surface, a second refraction surface, and an internal reflector. The first refraction surface has a first finite focal length. The second refraction surface has a second finite focal length. In operation, an optical signal enters the first refraction surface, couples from the first refraction surface to the second refraction surface via the internal reflector, and exits the second refraction surface, where the optical signal defines a light path. The light path optically couples the opto-electronic board to the optical fiber.Type: GrantFiled: August 28, 2002Date of Patent: October 18, 2005Assignee: Silicon Light Machines CorporationInventors: Syed Tariq Shafaat, Clinton B. Carlisle, Marc Hartranft
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Patent number: 6892449Abstract: A method of manufacturing a plurality of electro-optical sub-assemblies in parallel is provided. A plurality of printed circuit boards (PCBs) are preferably formed in a panel of flex material. Rigid substrates can be arranged along regions of the PCBs. A plurality of electrical components, including electro-optical semiconductor devices, are preferably located on the rigid substrates. Lens arrays are preferably aligned over the electro-optical semiconductor devices, such as through an alignment mechanism. The PCBs can then be singulated into individual electro-optical sub-assemblies. The rigid substrates can be a plurality of leadframes formed on a matrix leadframe. The matrix leadframe is preferably attached to the panel of flex material such that the leadframes are arranged in proximity to leadframe cutout regions of the PCBs. Electrical interconnections are then preferably formed between the electrical components on the leadframe and the PCBs.Type: GrantFiled: October 9, 2002Date of Patent: May 17, 2005Assignee: Cypress Semiconductor Corp.Inventors: Brenor Brophy, Marc Hartranft, Syed Tariq Shafaat, Jeff Hall
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Patent number: 6890107Abstract: An electro-optical apparatus constructed according to various inventive principles disclosed herein provides flexibility in the type and arrangement of components. The electro-optical apparatus preferably includes a Printed Circuit Board (PCB). An interface device can be electrically connected to the PCB, and an electro-optical device can be electrically connected to the interface device. A lens is preferably arranged in optical communication with the electro-optical device. Numerous variations in component selection and arrangement are contemplated within the scope of these inventive principles. Various methods for configuring an electro-optical apparatus are also provided.Type: GrantFiled: October 9, 2002Date of Patent: May 10, 2005Assignee: Cypress Semiconductor Corp.Inventors: Brenor Brophy, Marc Hartranft, Syed Tariq Shafaat, Jeff Hall
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Patent number: 6815729Abstract: An electro-optical device preferably includes a printed circuit board (PCB) having a cutout region or a rigid region. A leadframe having an electro-optical semiconductor device arranged thereon can be arranged in proximity to the cutout region of the PCB. Alternatively, the electro-optical device can be arranged on the rigid region of the PCB. A lens is preferably arranged over the electro-optical semiconductor device. A connector array can also be arranged on the PCB to communicate electrical signals with an external device. An interface circuit, such as a driver circuit or an amplifier circuit, can also be arranged in close proximity to the electro-optical semiconductor devices on the leadframe or the PCB.Type: GrantFiled: October 9, 2002Date of Patent: November 9, 2004Assignee: Cypress Semiconductor Corp.Inventors: Brenor Brophy, Marc Hartranft, Syed Tariq Shafaat, Jeff Hall
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Patent number: 5846874Abstract: An anchor structure placed in an open field in corner areas of the semiconductor die and along die edges for preventing cracks in the die. In the corner areas, the anchor structure is placed perpendicular to a resultant vector force, which is approximately at a 45.degree. angle to an imaginary horizontal line passing through the die. This perpendicular placement of the anchor structure more uniformly distributes the stresses along the anchor preventing corner cracks in the die. Along the die edges, the anchor structures are placed approximately perpendicular to the resultant vector forces that impinge the die edges.Type: GrantFiled: February 28, 1997Date of Patent: December 8, 1998Assignee: Cypress Semiconductor Corp.Inventors: Marc Hartranft, Pat Zicolello
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Patent number: 5650666Abstract: An anchor structure placed in an open field in corner areas of the semiconductor die and along die edges for preventing cracks in the die. In the corner areas, the anchor structure is placed perpendicular to a resultant vector force, which is approximately at a 45.degree. angle to an imaginary horizontal line passing through the die. This perpendicular placement of the anchor structure more uniformly distributes the stresses along the anchor preventing corner cracks in the die. Along the die edges, the anchor structures are placed approximately perpendicular to the resultant vector forces that impinge the die edges.Type: GrantFiled: November 22, 1995Date of Patent: July 22, 1997Assignee: Cypress Semiconductor Corp.Inventors: Marc Hartranft, Pat Zicolello