Patents by Inventor Marcel DeGrandpre

Marcel DeGrandpre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6985503
    Abstract: An inverse multiplexer device has an input port for receiving a stream of data packets, a plurality of output ports for connection to outgoing physical links, and transmit buffers for preparing outgoing packets. An expansion port can receive packets from the transmit buffers and transfer them through a corresponding expansion port on another like inverse multiplexer to designated output links on the other inverse multiplexer. A controller outputs the data packets on a group of any of the aid links in accordance with an inverse multiplex protocol. The multiplexers can be thus cascaded to increase the number of output links that can be accommodated.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: January 10, 2006
    Assignee: Zarlink Semiconductor Inc.
    Inventors: Marcel DeGrandpre, Alexandre Pires
  • Patent number: 6678275
    Abstract: A termination device for connection to a group of TDM (time division multiplexed) trunks is capable of sending cells over one or more links either individually or as part of an inverse multiplexed group. The device includes a Utopia interface for receiving an incoming cell stream, a buffer for storing incoming cells at specific memory locations identified by pointers obtained from a queue of available pointers, a round robin scheduler for sequentially assigning cells to links forming an IMA group or individually in the UNI mode, and a pointer queue for each channel address, the pointer queue indicating the location of the next cell to be transmitted for each virtual channel. An adaptive shaper determines when a stuff cell is inserted and a per link output circuit places cells on the links, which can operate in CTC or ITC mode. The device can operate in mixed mode where up to four IMA and/or up to eight UNI channels can be supported concurrently. The links assigned to the IMA or UNI channels is programmable.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: January 13, 2004
    Assignee: Zarlink Semiconductor Inc.
    Inventors: Marcel DeGrandpre, Alexandre Pires
  • Publication number: 20020021661
    Abstract: An interface apparatus includes first and second devices, each having a series of ports for connection to a common packet transfer bus associated with a controller. The devices operate in parallel and are configured so that when one is in an active mode the other is in a warm stand-by mode ready to become active in the event of failure of the active device. The ports of the device in the active mode communicate normally with the controller to initiate transfer of the packets over the packet transfer bus. The ports of the device in the standby mode are inoperative to communicate with the controller to initiate packet transfer, but otherwise operate normally so as to be ready for immediate activation in the event of failure of the device in the active mode.
    Type: Application
    Filed: June 21, 2001
    Publication date: February 21, 2002
    Inventors: Marcel DeGrandpre, Francois Bourdon