Abstract: A semiconductor device comprising an on-mold antenna for transmitting and/or receiving a millimeter-wave radio frequency signal is provided. The semiconductor device includes a semiconductor layer; a polymer layer proximal to the semiconductor layer; a mold proximal to the polymer layer; a plurality of nodes proximal to the semiconductor layer and distal to the polymer layer; an antenna disposed on the mold; and a conductive element providing electrical communication between the antenna and a first node. The mold may be from 500 ?m to 1000 ?m thick, such as from 750 ?m to 800 ?m thick, such as about 775 ?m.

Abstract: RF semiconductor chips may be packaged on wafer level on the basis of a two-step process for providing a package material, thereby providing very short electrical connections between antenna structures formed in the package material and the semiconductor chip. In some illustrative embodiments, the antenna structures may be provided above the semiconductor chip, which results in a very space-efficient overall configuration.

Abstract: RF semiconductor chips may be packaged on wafer level on the basis of a two-step process for providing a package material, thereby providing very short electrical connections between antenna structures formed in the package material and the semiconductor chip. In some illustrative embodiments, the antenna structures may be provided above the semiconductor chip, which results in a very space-efficient overall configuration.

Abstract: A semiconductor device comprising an on-mold antenna for transmitting and/or receiving a millimeter-wave radio frequency signal is provided. The semiconductor device includes a semiconductor layer; a polymer layer proximal to the semiconductor layer; a mold proximal to the polymer layer; a plurality of nodes proximal to the semiconductor layer and distal to the polymer layer; an antenna disposed on the mold; and a conductive element providing electrical communication between the antenna and a first node. The mold may be from 500 ?m to 1000 ?m thick, such as from 750 ?m to 800 ?m thick, such as about 775 ?m.

Abstract: When forming sophisticated semiconductor devices including metal pillars arranged on contact pads, which may comprise aluminum, device performance and reliability may be improved by avoiding exposure of the contact pad material to the ambient atmosphere, in particular during and between dicing and packaging processes. To this end, the contact pad material may be covered by a protection layer or may be protected by the metal pillars itself, thereby concurrently improving mechanical stress distribution in the device.

Abstract: When forming sophisticated semiconductor devices including metal pillars arranged on contact pads, which may comprise aluminum, device performance and reliability may be improved by avoiding exposure of the contact pad material to the ambient atmosphere, in particular during and between dicing and packaging processes. To this end, the contact pad material may be covered by a protection layer or may be protected by the metal pillars itself, thereby concurrently improving mechanical stress distribution in the device.

Abstract: The present invention provides a new technology approach for forming a contact layer in a microelectronic chip, which includes a plurality of solder bumps that are directly to be connected with a correspondingly designed carrier substrate. In the process flow, a plasma-based process for patterning the underbump metallization layer is used in combination with testing and assembling the device, thereby providing a high degree of process flexibility and/or cost reduction and/or device performance.

Abstract: In a method according to the present invention, a substrate thinning process is performed on a bumped substrate prior to the ultimate solder reflow process to heal bump defects caused by the substrate thinning process. Concurrently, the risk of substrate breakage is reduced compared to the prior art process since the number of process steps, requiring handling of thinned substrates, is reduced.

Abstract: By directly forming an underbump metallization layer on a contact region of the last metallization layer, the formation of any other terminal metals, such as aluminum and corresponding adhesion/barrier layers, may be avoided. Consequently, the thermal and electrical behavior of the resulting bump structure may be improved, while process complexity may be significantly reduced.

Abstract: The present invention provides a new technology approach for forming a contact layer in a microelectronic chip, which includes a plurality of solder bumps that are directly to be connected with a correspondingly designed carrier substrate. In the process flow, a plasma-based process for patterning the underbump metallization layer is used in combination with testing and assembling the device, thereby providing a high degree of process flexibility and/or cost reduction and/or device performance.

Abstract: In a method according to the present invention, a substrate thinning process is performed on a bumped substrate prior to the ultimate solder reflow process to heal bump defects caused by the substrate thinning process. Concurrently, the risk of substrate breakage is reduced compared to the prior art process since the number of process steps, requiring handling of thinned substrates, is reduced.