Abstract: A method of fabricating a microelectronic multi-chip module comprises: providing a cavity down ball grid array having a die and solder balls on a die side thereof; providing a package including at least one die thereon on a die side thereof; stacking the package onto the backside of the ball grid array opposite from the die side of the ball grid array. The backsides of the ball grid array and of the package may include land pads for providing interconnection between the ball grid array and the package during stacking.

Abstract: A method and apparatus for multi-chip packages that are closely coupled using an interposer is disclosed. A top single chip or multi-chip encapsulated package with bottom side contacts is formed and tested. A bottom single chip or multi-chip package substrate having bottom contacts is formed. Then a hollow center interposer is connected to the periphery of the package substrate leaving the chips at the center exposed, and the hollow region is filled with an encapsulant to the level of the top of the interposer, to form the finished package having contact on the bottom and on the top. After the bottom package undergoes electrical function testing, the top package is soldered to the interposer forming a completed multi-chip package.