Patents by Inventor Marcin Andrzej Chrapek

Marcin Andrzej Chrapek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CACHE OPTIMIZATION MECHANISM
    Publication number: 20240160581
    Abstract: An apparatus includes a central processing unit (CPU), including a plurality of processing cores, each having a cache memory, a fabric interconnect coupled to the plurality of processing cores and cryptographic circuitry, coupled to the fabric interconnect including mesh stop station to receive memory data and determine a destination of the memory data and encryption circuitry to encrypt/decrypt the memory data based on a destination of the memory data.
    Type: Application
    Filed: November 14, 2022
    Publication date: May 16, 2024
    Applicant: Intel Corporation
    Inventors: Marcin Andrzej Chrapek, Reshma Lal
  • DATA TRANSFER ENCRYPTION MECHANISM
    Publication number: 20240134804
    Abstract: An apparatus comprising translator circuitry to receive a plurality of physical addresses of memory data, determine an offset associated with each of the physical page addresses and apply a tweak seed to each offset to generate a plurality of tweaks.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 25, 2024
    Applicant: Intel Corporation
    Inventors: Marcin Andrzej Chrapek, Reshma Lal