Abstract: A Phase-locked loop circuit including: a local oscillator, configured to generate a timing signal; a variable-length shift register, controlled by the timing signal; and a feedback control circuit, which receives a pulsed input signal and receives a local signal from the shift register. The feedback control circuit detects whether each pulse of the input signal respects a condition of temporal proximity with a corresponding pulse of the local signal and detects, for each pulse of the input signal that respects the proximity condition, whether the edge falls early, late, or within a predefined portion of the corresponding pulse of the local signal. The feedback control circuit controls the length of the shift register and the frequency of the timing signal, as a function of the detections made.

Abstract: A Phase-locked loop circuit including: a local oscillator, configured to generate a timing signal; a variable-length shift register, controlled by the timing signal; and a feedback control circuit, which receives a pulsed input signal and receives a local signal from the shift register. The feedback control circuit detects whether each pulse of the input signal respects a condition of temporal proximity with a corresponding pulse of the local signal (Voce) and detects, for each pulse of the input signal that respects the proximity condition, whether the edge falls early, late, or within a predefined portion of the corresponding pulse of the local signal. The feedback control circuit controls the length of the shift register and the frequency of the timing signal, as a function of the detections made.

Abstract: In accordance with some embodiments, receivers for receiving a wireless data transmission are provided, the receivers comprising at least one amplifier that receives an RF input signal and produces at least one amplified signal; a mixer that mixes the at least one signal to produce a mixed signal; a filter that filters the mixed signal to produce a filtered signal, a comparator that compares the filtered signal to a threshold voltage and produces a digital signal, a first pulse generate i that generates a first pulse in response to a transition in the digital signal, a second pulse generator that generates a second pulse that is longer than the first pulse in response to a transition in the digital signal; and digital logic that generates a clock output and that generates a data output based on a state of the first pulse when the second pulse expires.

Abstract: In accordance with some embodiments, receivers for receiving a wireless data transmission are provided, the receivers comprising at least one amplifier that receives an RF input signal and produces at least one amplified signal; a mixer that mixes the at least one signal to produce a mixed signal; a filter that filters the mixed signal to produce a filtered signal, a comparator that compares the filtered signal to a threshold voltage and produces a digital signal, a first pulse generate i that generates a first pulse in response to a transition in the digital signal, a second pulse generator that generates a second pulse that is longer than the first pulse in response to a transition in the digital signal; and digital logic that generates a clock output and that generates a data output based on a state of the first pulse when the second pulse expires.