Patents by Inventor Marco Flaibani
Marco Flaibani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11637490Abstract: In some examples, a device for controlling a transistor in a power converter system includes a first circuit configured to generate an error current based on a difference between a reference signal and a feedback signal, where the feedback signal depends on an output voltage of the power converter system. The device also includes a frequency generator configured to generate an activation signal based on the difference between the reference signal and the feedback signal. The device further includes a pedestal circuit configured to define a peak current threshold for the transistor based on an offset value. The device also includes a logic circuit configured to activate the transistor based on the activation signal and deactivate the transistor when a current sense signal reaches the defined peak current threshold, where the current sense signal is representative of a power current conducted by the transistor.Type: GrantFiled: June 21, 2021Date of Patent: April 25, 2023Assignee: Infineon Technologies AGInventors: Marco Flaibani, Davide Dal Bianco, Giuseppe Loccia, Tommaso Pieretti, Winand Van Sloten
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Publication number: 20220407417Abstract: In some examples, a device for controlling a transistor in a power converter system includes a first circuit configured to generate an error current based on a difference between a reference signal and a feedback signal, where the feedback signal depends on an output voltage of the power converter system. The device also includes a frequency generator configured to generate an activation signal based on the difference between the reference signal and the feedback signal. The device further includes a pedestal circuit configured to define a peak current threshold for the transistor based on an offset value. The device also includes a logic circuit configured to activate the transistor based on the activation signal and deactivate the transistor when a current sense signal reaches the defined peak current threshold, where the current sense signal is representative of a power current conducted by the transistor.Type: ApplicationFiled: June 21, 2021Publication date: December 22, 2022Inventors: Marco Flaibani, Davide Dal Bianco, Giuseppe Loccia, Tommaso Pieretti, Winand Van Sloten
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Patent number: 11002767Abstract: The disclosure describes techniques for measuring the average output current of a power converter circuit by determining peaks valleys in the output current. A current monitoring circuit may include an averaging unit, which may sample the output current during a current peak as well as during a current valley. During a hold phase the averaging unit may output a signal proportional to the average output current based on the sampled peak current and sampled valley current. In some examples, the averaging unit may include three functional units. A first unit may be configured to determine the output current, a second block may be configured to hold the previously determined peak current and a third block may be configured to hold the previously determined valley current. In this manner the averaging unit may continuously output a signal proportional to the average output current of the power converter.Type: GrantFiled: March 15, 2019Date of Patent: May 11, 2021Assignee: Infineon Technologies AGInventors: Giuseppe Loccia, Marco Flaibani
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Publication number: 20200292586Abstract: The disclosure describes techniques for measuring the average output current of a power converter circuit by determining peaks valleys in the output current. A current monitoring circuit may include an averaging unit, which may sample the output current during a current peak as well as during a current valley. During a hold phase the averaging unit may output a signal proportional to the average output current based on the sampled peak current and sampled valley current. In some examples, the averaging unit may include three functional units. A first unit may be configured to determine the output current, a second block may be configured to hold the previously determined peak current and a third block may be configured to hold the previously determined valley current. In this manner the averaging unit may continuously output a signal proportional to the average output current of the power converter.Type: ApplicationFiled: March 15, 2019Publication date: September 17, 2020Inventors: Giuseppe Loccia, Marco Flaibani
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Patent number: 10601318Abstract: In accordance with an embodiment, a circuit includes a power conversion circuit including an inductor and configured to convert an input voltage to an output voltage in accordance with at least one switching signal. The circuit further includes a first current sense circuit configured to generate a current sense signal that represents an inductor current, a voltage sense circuit configured to generate a voltage sense signal that represents the output voltage, and a switching controller including an error amplifier configured to generate an error signal representing the difference between a reference voltage and the voltage sense signal. The switching controller further includes an oscillator circuit configured to generate, for pulse frequency modulation (PFM) operation of the power conversion circuit, the switching signal as a sequence of pulses with a pulse repetition frequency that depends on the error signal and the current sense signal.Type: GrantFiled: January 28, 2019Date of Patent: March 24, 2020Assignee: INFINEON TECHNOLOGIES AGInventors: Marco Flaibani, Stefano Orlandi
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Publication number: 20190238054Abstract: In accordance with an embodiment, a circuit includes a power conversion circuit including an inductor and configured to convert an input voltage to an output voltage in accordance with at least one switching signal. The circuit further includes a first current sense circuit configured to generate a current sense signal that represents an inductor current, a voltage sense circuit configured to generate a voltage sense signal that represents the output voltage, and a switching controller including an error amplifier configured to generate an error signal representing the difference between a reference voltage and the voltage sense signal. The switching controller further includes an oscillator circuit configured to generate, for pulse frequency modulation (PFM) operation of the power conversion circuit, the switching signal as a sequence of pulses with a pulse repetition frequency that depends on the error signal and the current sense signal.Type: ApplicationFiled: January 28, 2019Publication date: August 1, 2019Inventors: Marco Flaibani, Stefano Orlandi
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Publication number: 20170364111Abstract: A circuit comprising a series voltage regulator comprising a first semiconductor device coupled in series between a supply voltage and a voltage output, the series regulator operable to receive a voltage level from the supply voltage and to provide a regulated voltage level at the voltage output; and a parallel voltage regulator comprising a second semiconductor device coupled to the voltage output, the parallel voltage regulator operable to detect a variation in a voltage level provided at the voltage output, and to sink and/or source a current from/to the voltage output through the semiconductor device, an amount of current sunk and/or sourced adequate to offset the change in the voltage level at the voltage output.Type: ApplicationFiled: June 21, 2016Publication date: December 21, 2017Inventors: Marco Flaibani, Giovanni Bisson, Marco Piselli
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Patent number: 9501075Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.Type: GrantFiled: October 3, 2014Date of Patent: November 22, 2016Assignee: Infineon Technologies Austria AGInventors: Giovanni Bisson, Marco Flaibani, Marco Piselli
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Patent number: 9134743Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.Type: GrantFiled: April 30, 2012Date of Patent: September 15, 2015Assignee: Infineon Technologies Austria AGInventors: Glovanni Bisson, Marco Flaibani, Marco Piselli
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Publication number: 20150022166Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.Type: ApplicationFiled: October 3, 2014Publication date: January 22, 2015Inventors: Giovanni Bisson, Marco Flaibani, Marco Piselli
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Patent number: 8810227Abstract: In an embodiment, a method of operating a switched-mode power supply includes producing an error signal based on a difference between a power supply output voltage and a reference voltage. A clock frequency is produced that is proportional to the error signal up to maximum frequency, and a sensed current signal is produced that is proportional to a current in switched-mode power supply. The error signal is summed with the sensed current signal to produce a first signal, and the first signal is compared to a first threshold. The method also includes producing a first edge of a drive signal at a first edge of the clock signal, and producing a second edge of the drive signal when the first signal crosses the first threshold in a first direction based on the comparing, where the second edge opposite the first edge.Type: GrantFiled: January 14, 2011Date of Patent: August 19, 2014Assignee: Infineon Technologies Austria AGInventors: Marco Flaibani, Cristian Garbossa, Enrico Orietti, Andrea Vecchiato
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Publication number: 20130285631Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.Type: ApplicationFiled: April 30, 2012Publication date: October 31, 2013Applicant: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Giovanni Bisson, Marco Flaibani, Marco Piselli
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Patent number: 8497714Abstract: In an embodiment, a method of driving a switch transistor includes activating the switch transistor by charging a control node of the switch transistor at a first charging rate for a first time duration. After charging the control node of the switch transistor at the first charging rate, the control node of the switch transistor is further charged at a second charging rate until the control node of the switch transistor reaches a target signal level, where the second charging rate is less than the first charging rate.Type: GrantFiled: January 14, 2011Date of Patent: July 30, 2013Assignee: Infineon Technologies Austria AGInventors: Cristian Garbossa, Andrea Vecchiato, Marco Flaibani, Enrico Orietti
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Publication number: 20120182049Abstract: In an embodiment, a method of driving a switch transistor includes activating the switch transistor by charging a control node of the switch transistor at a first charging rate for a first time duration. After charging the control node of the switch transistor at the first charging rate, the control node of the switch transistor is further charged at a second charging rate until the control node of the switch transistor reaches a target signal level, where the second charging rate is less than the first charging rate.Type: ApplicationFiled: January 14, 2011Publication date: July 19, 2012Inventors: Cristian Garbossa, Andrea Vecchiato, Marco Flaibani, Enrico Orietti
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Publication number: 20120182003Abstract: In an embodiment, a method of operating a switched-mode power supply includes producing an error signal based on a difference between a power supply output voltage and a reference voltage. A clock frequency is produced that is proportional to the error signal up to maximum frequency, and a sensed current signal is produced that is proportional to a current in switched-mode power supply. The error signal is summed with the sensed current signal to produce a first signal, and the first signal is compared to a first threshold. The method also includes producing a first edge of a drive signal at a first edge of the clock signal, and producing a second edge of the drive signal when the first signal crosses the first threshold in a first direction based on the comparing, where the second edge opposite the first edge.Type: ApplicationFiled: January 14, 2011Publication date: July 19, 2012Inventors: Marco Flaibani, Cristian Garbossa, Enrico Orietti, Andrea Vecchiato
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Publication number: 20120153919Abstract: A method for controlling a switching converter is disclosed whereby the switching converter is configured to convert an input voltage into an output voltage supplied to a load in accordance with a switching signal, The switching converter is configured to operate in a pulse width modulation mode or, alternatively, in a pulse frequency modulation mode. When operating in the pulse width modulation mode, generating, as the switching signal, a pulse width modulated (PWM) signal of a pre-defined constant switching frequency. The PWM signal has a duty cycle that is regulated such that the output voltage of the switching converter matches, at least approximately, a desired output voltage under the condition that the duty cycle being regulated such that it does not fall below a predefined minimum duty cycle. The output voltage is monitored and switched over to the pulse frequency modulation mode when the output voltage exceeds a predefined first threshold.Type: ApplicationFiled: December 17, 2010Publication date: June 21, 2012Inventors: Cristian Garbossa, Marco Flaibani, Andrea Vecchiato, Enrico Orietti
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Patent number: 7733153Abstract: The invention relates to a level shifter comprising an input stage having a parasitic capacitance and a first input terminal for applying an input signal, a limiter stage having a second input terminal for applying a switching signal, wherein said input stage is coupled between a first supply terminal and said limiter stage, an output stage being coupled between a second supply terminal and said limiter stage and providing an output signal which is a level shifted version of said input signal, and a current source being adapted for injecting a current pulse into said parasitic capacitance dependent on variations of said switching signal over time.Type: GrantFiled: March 28, 2008Date of Patent: June 8, 2010Assignee: Infineon Technologies AGInventors: Marco Flaibani, Emanuele Bodano, Cristian Garbossa
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Patent number: 7504868Abstract: A circuit arrangement comprising a high-side semiconductor switch with a first load terminal connected to a first supply terminal receiving an input voltage, a second load terminal connected to an output terminal providing an output signal, and a control terminal, a floating driver circuit connected to the control terminal for driving the semiconductor switch, a level shifter receiving an input signal and providing a floating input signal dependent on the input signal, a floating control logic receiving the output signal and the floating input signal and providing at least one control signal to the floating driver circuit, wherein the floating control logic comprises means for detecting an edge in the output signal and means for generating the control signal dependent on the result of the edge detection.Type: GrantFiled: March 15, 2007Date of Patent: March 17, 2009Assignee: Infineon Technologies AGInventors: Emanuele Bodano, Marco Flaibani, Cristian Garbossa
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Patent number: 7468622Abstract: An integrated circuit having a bootstrap charger for using in a switching mode power supply is disclosed. In one embodiment, a capacitor is connected between a floating terminal and a bootstrap supply terminal with a voltage drop over the capacitor, a comparing device with a first input terminal receiving a fraction of the voltage drop, a second input terminal receiving a reference, and an output terminal providing a control signal, and a charge circuit configured to charge the capacitor dependent on the control signal.Type: GrantFiled: January 25, 2007Date of Patent: December 23, 2008Assignee: Infineon Technologies AGInventors: Emanuele Bodano, Christian Garbossa, Marco Flaibani
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Publication number: 20080238525Abstract: The invention relates to a level shifter comprising an input stage having a parasitic capacitance and a first input terminal for applying an input signal, a limiter stage having a second input terminal for applying a switching signal, wherein said input stage is coupled between a first supply terminal and said limiter stage, an output stage being coupled between a second supply terminal and said limiter stage and providing an output signal which is a level shifted version of said input signal, and a current source being adapted for injecting a current pulse into said parasitic capacitance dependent on variations of said switching signal over time.Type: ApplicationFiled: March 28, 2008Publication date: October 2, 2008Inventors: Marco Flaibani, Emanuele Bodano, Cristian Garbossa