Abstract: A circuit for detecting failure of a device includes a plurality of monitoring modules. Each respective monitoring module of the plurality of monitoring modules is configured to generate a monitoring value at an output of the respective monitoring module based on a signal received at an input of the respective monitoring module. The circuit further includes a data selector module configured to couple, for each step of a switching cycle, the input of each of the plurality of monitoring modules to one of a plurality of function modules such that each of the plurality of monitoring modules generates the monitoring value for each of the plurality of function modules to generate monitoring information and evaluation logic configured to determine whether a failure has occurred at the plurality of function modules based on the monitoring information.

Abstract: A circuit for detecting failure of a device includes a plurality of monitoring modules. Each respective monitoring module of the plurality of monitoring modules is configured to generate a monitoring value at an output of the respective monitoring module based on a signal received at an input of the respective monitoring module. The circuit further includes a data selector module configured to couple, for each step of a switching cycle, the input of each of the plurality of monitoring modules to one of a plurality of function modules such that each of the plurality of monitoring modules generates the monitoring value for each of the plurality of function modules to generate monitoring information and evaluation logic configured to determine whether a failure has occurred at the plurality of function modules based on the monitoring information.

Abstract: In some examples, a device includes an amplifier circuit configured to receive a reference voltage signal at a first input, receive a feedback signal at a second input, and generate an output signal based on the reference voltage signal and the feedback signal. In some examples, the device also includes a feedback circuit including a soft-shaper circuit that is electrically connected to the second input of the amplifier circuit. In some examples, the feedback circuit is configured to sense a voltage step in the reference voltage signal, generate a voltage step across the soft-shaper circuit approximately equal to the voltage step in the reference voltage signal in response to sensing the voltage step in the reference voltage signal, and ramp a voltage level across the soft-shaper circuit to zero after generating the voltage step across the soft-shaper circuit.

Abstract: In some examples, a device includes an amplifier circuit configured to receive a reference voltage signal at a first input, receive a feedback signal at a second input, and generate an output signal based on the reference voltage signal and the feedback signal. In some examples, the device also includes a feedback circuit including a soft-shaper circuit that is electrically connected to the second input of the amplifier circuit. In some examples, the feedback circuit is configured to sense a voltage step in the reference voltage signal, generate a voltage step across the soft-shaper circuit approximately equal to the voltage step in the reference voltage signal in response to sensing the voltage step in the reference voltage signal, and ramp a voltage level across the soft-shaper circuit to zero after generating the voltage step across the soft-shaper circuit.

Abstract: A circuit comprising a series voltage regulator comprising a first semiconductor device coupled in series between a supply voltage and a voltage output, the series regulator operable to receive a voltage level from the supply voltage and to provide a regulated voltage level at the voltage output; and a parallel voltage regulator comprising a second semiconductor device coupled to the voltage output, the parallel voltage regulator operable to detect a variation in a voltage level provided at the voltage output, and to sink and/or source a current from/to the voltage output through the semiconductor device, an amount of current sunk and/or sourced adequate to offset the change in the voltage level at the voltage output.

Abstract: In one example, a circuit includes a first voltage converter and a second voltage converter. The first voltage converter is configured to convert a first voltage to a second voltage, determine whether the first voltage converter is operating in an unsafe state, and output an indication that the first voltage converter is operating in the unsafe state. The second voltage converter is configured to selectively activate a high side switch and a low side switch to convert the second voltage to a third voltage. In response to receiving the indication that the first voltage converter is operating in the unsafe state, the second voltage converter is further configured to activate the high side switch and the low side switch to establish an electrical path between the second voltage and a reference node of the circuit.

Abstract: Example current tracking circuits and systems as well as methods for tracking current are described herein. In one example, a current tracking circuit comprises a current mirror that receives a power supply input and a control signal as inputs, wherein the current mirror has a mirror ratio. The current tracking circuit also comprises a programmability sub-circuit coupled to the current mirror that trims a value of the mirror ratio. In another example, a method comprises performing current mirroring using a current mirror comprising a sense device, wherein a mirror ratio of the current mirror is based on a programmable sub-circuit. The method further comprises maintaining, by a voltage regulation loop, a collector potential of the sense device within a threshold difference level of a collector potential of a power device coupled to the sense device, wherein the sense device mirrors a current flowing in the power device.

Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.

Abstract: A drive circuit includes a first input terminal configured to receive a first input signal, a first output terminal configured to provide a first drive signal, a second output terminal configured to provide a second drive signal, and a mode selection terminal configured to have a mode selection element connected thereto. The drive circuit is configured to generate the first and second drive signals dependent on the first input signal such that there is a dead time between a time when one of the first and second drive signals assumes an off-level and a time when the other one of the first and second drive signals assumes an on-level, and evaluate at least one electrical parameter of the mode selection element and is configured to adjust a first signal range of the first drive signal and a second signal range of the second drive signal dependent on the evaluated parameter and to adjust the dead time dependent on the evaluated parameter.

Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.

Abstract: Example current tracking circuits and systems as well as methods for tracking current are described herein. In one example, a current tracking circuit comprises a current mirror that receives a power supply input and a control signal as inputs, wherein the current mirror has a mirror ratio. The current tracking circuit also comprises a programmability sub-circuit coupled to the current mirror that trims a value of the mirror ratio. In another example, a method comprises performing current mirroring using a current mirror comprising a sense device, wherein a mirror ratio of the current mirror is based on a programmable sub-circuit. The method further comprises maintaining, by a voltage regulation loop, a collector potential of the sense device within a threshold difference level of a collector potential of a power device coupled to the sense device, wherein the sense device mirrors a current flowing in the power device.

Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.

Abstract: A low-dropout voltage regulator includes a power transistor configured to receive an input voltage and to provide a regulated output voltage at an output voltage node. The power transistor includes a control electrode configured to receive a driver signal. A reference circuit is configured to generate a reference voltage. A feedback network is coupled to the power transistor and is configured to provide a first feedback signal and a second feedback signal. The first feedback signal represents the output voltage and the second feedback signal represents an output voltage gradient. An error amplifier is configured to receive the reference voltage and the first feedback signal representing the output voltage. The error amplifier is configured to generate the driver signal dependent on the reference voltage and the first feedback signal. The error amplifier includes an output stage that is biased with a bias current responsive to the second feedback signal.

Abstract: A drive circuit includes a first input terminal configured to receive a first input signal, a first output terminal configured to provide a first drive signal, a second output terminal configured to provide a second drive signal, and a mode selection terminal configured to have a mode selection element connected thereto. The drive circuit is configured to generate the first and second drive signals dependent on the first input signal such that there is a dead time between a time when one of the first and second drive signals assumes an off-level and a time when the other one of the first and second drive signals assumes an on-level, and evaluate at least one electrical parameter of the mode selection element and is configured to adjust a first signal range of the first drive signal and a second signal range of the second drive signal dependent on the evaluated parameter and to adjust the dead time dependent on the evaluated parameter.

Abstract: Preferred embodiments of the present invention are a switching converter, an integrated circuit package, and method for controlling a switching converter. An embodiment of the invention is a switching converter comprising a first compensation network having a first node coupled to an error voltage and a second node coupled to electrical ground and a second compensation network having an input coupled to the error voltage. A frequency domain transfer function of the first compensation network comprises a first zero and a plurality of first poles, and a frequency domain transfer function of the second compensation network comprises a second zero and a second pole.

Abstract: A system and method for adapting a width of a clocking pulse for clocking a DC-DC converter, wherein the width of the clocking pulse is selected based upon the duty cycle of the DC-DC converter. When the DC-DC converter operates below a predefined threshold duty cycle, a clocking pulse of a first width is selected to allow operation of the converter at a minimum predefined duty cycle with a clocking frequency that minimizes output voltage ripple. The first width corresponds to an on-time of a switching transistor of the DC-DC converter when the converter is operated at the minimum duty cycle. When the DC-DC converter operates above the predefined threshold duty cycle, a clocking pulse of a second width is selected to allow operation of the converter at high duty cycles while simultaneously avoiding missed inductor current pulses and generation of sub-harmonic voltage oscillations.

Abstract: Preferred embodiments of the present invention are a switching converter, an integrated circuit package, and method for controlling a switching converter. An embodiment of the invention is a switching converter comprising a first compensation network having a first node coupled to an error voltage and a second node coupled to electrical ground and a second compensation network having an input coupled to the error voltage. A frequency domain transfer function of the first compensation network comprises a first zero and a plurality of first poles, and a frequency domain transfer function of the second compensation network comprises a second zero and a second pole.

Abstract: A system and method for adapting a width of a clocking pulse for clocking a DC-DC converter, wherein the width of the clocking pulse is selected based upon the duty cycle of the DC-DC converter. When the DC-DC converter operates below a predefined threshold duty cycle, a clocking pulse of a first width is selected to allow operation of the converter at a minimum predefined duty cycle with a clocking frequency that minimizes output voltage ripple. The first width corresponds to an on-time of a switching transistor of the DC-DC converter when the converter is operated at the minimum duty cycle. When the DC-DC converter operates above the predefined threshold duty cycle, a clocking pulse of a second width is selected to allow operation of the converter at high duty cycles while simultaneously avoiding missed inductor current pulses and generation of sub-harmonic voltage oscillations.