Patents by Inventor Marcus Marrow

Marcus Marrow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9337873
    Abstract: Miscorrection detection for error correction codes using bit reliabilities includes receiving a plurality of reliabilities corresponding to respective ones of a plurality of read values, receiving one or more proposed corrections corresponding to one or more of the plurality of read values, and determining a miscorrection metric based at least in part on one or more of the plurality of reliabilities corresponding to the one or more of the plurality of read values.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: May 10, 2016
    Assignee: SK Hynix Inc.
    Inventors: Marcus Marrow, Jason Bellorado, Zheng Wu, Naveen Kumar
  • Patent number: 9300329
    Abstract: Decoding associated with a second error correction code and a first error correction code is performed. Ns first and second-corrected segments of data, first sets of parity information, and second sets of parity information are intersegment interleaved to obtain intersegment interleaved data, where the Ns segments of data, the Ns first sets of parity information, and the Ns second sets of parity information have had decoding associated with the first and the second error correction code performed on them (Ns is the number of segments interleaved together). Decoding associated with a third error correction code is performed on the intersegment interleaved data and interleaved parity information to obtain at least third-corrected interleaved data. The third-corrected interleaved data is de-interleaved.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: March 29, 2016
    Assignee: SK hynix memory solutions inc.
    Inventors: Naveen Kumar, Zheng Wu, Jason Bellorado, Lingqi Zeng, Marcus Marrow
  • Patent number: 9292394
    Abstract: An indication of a page type which failed error correction decoding is received. A threshold to adjust is selected from a plurality of thresholds based at least in part on the page type. A third adjusted threshold associated with the page type is generated, including by: determining a first number of flipped bits using a first adjusted threshold associated with the page type, determining a second number of flipped bits using a second adjusted threshold associated with the page type, and generating the third adjusted threshold using the first number of flipped bits and the second number of flipped bits.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: March 22, 2016
    Assignee: SK Hynix memory solutions inc.
    Inventors: Yingquan Wu, Marcus Marrow
  • Patent number: 9240245
    Abstract: An indication is received that a word line has been read. The word line is part of a plurality of word lines (in solid state storage) which is divided into a plurality of groups. It is determined which group is associated with the read. A count of consecutive, at least potentially uninformative reads is updated based at least in part on the group associated with the read and a group associated with a prior read. It is determining if the count is greater than a threshold and in the event it is determined the count is greater than the threshold, a read disturb check is triggered.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: January 19, 2016
    Assignee: SK hynix memory solutions inc.
    Inventors: Jason Bellorado, Marcus Marrow, Derrick Preston Chu
  • Patent number: 9170881
    Abstract: A first decoder performs decoding on each data set in a first plurality of data sets using a first code; each data set in the first plurality is stored on a different chip. It is determined if the first decoding is successful; if not, a second decoder performs a second decoding on each data set in a second plurality of data sets using a second code; each data set in the second plurality includes at least some data, after the first decoding using the first code, from each data set in the first plurality. The first decoder performs a third decoding on each data set in the first plurality using the first code, where each data set in the first plurality includes at least some data, after the second decoding using the second code, from each data set in the second plurality.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: October 27, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Marcus Marrow, Rajiv Agarwal
  • Patent number: 9142309
    Abstract: A victim group of one or more cells is read using a first read threshold to obtain a first raw read which includes one or more values. The victim group of cells is read using a second read threshold to obtain a second raw read which includes one or more values. A neighboring read, corresponding to a neighboring group of one or more cells associated with the victim group of cells, is obtained. A composite read is generated, including by selecting from at least the first raw read and the second raw read based at least in part on the neighboring read.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: September 22, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Jason Bellorado, Arunkumar Subramanian, Marcus Marrow, Zheng Wu, Lingqi Zeng
  • Patent number: 9124299
    Abstract: A set of branch metrics for a trellis associated with a Viterbi detector is generated. A set of path metrics associated with the trellis is generated based at least in part on the set of branch metrics, including by obtaining a pruned trellis by removing at least some portion of the trellis that is associated with an invalid bit sequence not permitted by a constrained code. A surviving path associated with the pruned trellis is selected based at least in part on the set of path metrics. A sequence of decisions associated with the surviving path is output.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: September 1, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Jason Bellorado, Marcus Marrow, Zheng Wu
  • Patent number: 9105304
    Abstract: Determining a parameter associated with whether a portion of a storage device is defective is disclosed. Determining comprises: obtaining known data associated with the portion; reading back from the portion to produce a read-back waveform; decoding the read-back waveform, including producing statistical information; and determining a parameter associated with whether the portion is defective based at least in part on the statistical information.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: August 11, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Marcus Marrow, Jason Bellorado, Yu Kou
  • Patent number: 9071266
    Abstract: An array f(n) is received for n=1, . . . , N where N is a length of a codeword. An array g(n) is received for n=1, . . . , N where N is a length of a codeword. Input data is encoded to satisfy an MTR constraint and a RLL constraint using the array f(n) and the array g(n).
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: June 30, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Zheng Wu, Jason Bellorado, Marcus Marrow
  • Publication number: 20150154089
    Abstract: An indication of a page type which failed error correction decoding is received. A threshold to adjust is selected from a plurality of thresholds based at least in part on the page type. A third adjusted threshold associated with the page type is generated, including by: determining a first number of flipped bits using a first adjusted threshold associated with the page type, determining a second number of flipped bits using a second adjusted threshold associated with the page type, and generating the third adjusted threshold using the first number of flipped bits and the second number of flipped bits.
    Type: Application
    Filed: December 2, 2014
    Publication date: June 4, 2015
    Inventors: Yingquan Wu, Marcus Marrow
  • Patent number: 9047213
    Abstract: Encoded least significant bit (LSB) values are generated for a cell based at least in part on a readback value for the cell. The encoded LSB values is decoded in order to obtain one or more decoded LSB values. Encoded most significant bit (MSB) values are generated for the cell based at least in part on (1) the readback value for the cell and (2) the decoded LSB values. The encoded MSB values are decoded in order to obtain one or more decoded MSB values, wherein the bit positions of the decoded LSB values do not overlap with the bit positions of the decoded MSB values.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: June 2, 2015
    Assignee: SK hynix memory solutions inc.
    Inventor: Marcus Marrow
  • Patent number: 9026881
    Abstract: A codebook which includes a plurality of messages and a plurality of codewords, a specified codeword bit value, and a specified message bit value are obtained. The LLR for bit ci in a codeword is generated, including by: identifying, from the codebook, those codewords where bit ci has the specified codeword bit value; for a message which corresponds to one of the codewords where bit ci has the specified codeword bit value, identifying those bits which have the specified message bit value; and summing one or more LLR values which correspond to those bits, in the message which corresponds to one of the codewords where bit ci has the specified codeword bit value, which have the specified message bit value.
    Type: Grant
    Filed: January 3, 2014
    Date of Patent: May 5, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Frederick K. H. Lee, Jason Bellorado, Zheng Wu, Marcus Marrow
  • Patent number: 9013817
    Abstract: Inter-track interference cancelation is disclosed, including: receiving an input sequence of samples associated with a track on magnetic storage; using a processor to generate inter-track interference (ITI) data associated with a first side track including by performing a correlation between the input sequence of samples and a sequence of data associated with the first side track.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: April 21, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Jason Bellorado, Marcus Marrow
  • Patent number: 9015540
    Abstract: Data which is read back from a multi-level storage device is received. For each bin in a set of bins, a portion of reads which fall into that particular bin and which are to be maintained is received. The set of bins is adjusted so that the read-back data, after assignment using the adjusted set of bins, matches the received portions of reads which are to be maintained.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: April 21, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Marcus Marrow, Jason Bellorado, Rajiv Agarwal
  • Publication number: 20150052419
    Abstract: A soft output detector is programmed with a first set of parameters. Soft information is generated according to the first set of parameters, including likelihood information that spans a maximum likelihood range. Error correction decoding is performed on the soft information generated according to the first set of parameters. In the event decoding is unsuccessful, the soft output detector is programmed with a second set of parameters, soft information according is generated to the second set of parameters (including likelihood information that is scaled down from the maximum likelihood range), and error correction decoding is performed on the soft information generated according to the second set of parameters.
    Type: Application
    Filed: October 29, 2014
    Publication date: February 19, 2015
    Inventors: Naveen Kumar, Zheng Wu, Jason Bellorado, Lingqi Zeng, Marcus Marrow
  • Publication number: 20150052408
    Abstract: A plurality of bins and a plurality of soft read values are stored in a lookup table where those bins that are either a leftmost bin or a rightmost bin correspond to soft read values having a maximum magnitude. Bin identification information is received for a cell in solid state storage. A soft read value is generated for the cell in solid state storage, including by: accessing the lookup table, mapping the received bin identification information to one of the plurality of bins in the lookup table, and selecting the soft read value in the lookup table that corresponds to the bin which is mapped to.
    Type: Application
    Filed: November 3, 2014
    Publication date: February 19, 2015
    Inventors: Frederick K.H. Lee, Jason Bellorado, Marcus Marrow
  • Patent number: 8943386
    Abstract: Bin identification information for a cell is generated. An estimation function is received where the estimation function trends toward a maximum soft read value at a first end and trends toward a minimum soft read value at a second end. A soft read value is determined for the cell based at least in part on the bin identification information and the estimation function.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: January 27, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Frederick K. H. Lee, Jason Bellorado, Marcus Marrow
  • Patent number: 8929138
    Abstract: An indication of a page type which failed error correction decoding is received. A threshold to adjust is selected from a plurality of thresholds based at least in part on the page type. A third adjusted threshold associated with the page type is generated, including by: determining a first number of flipped bits using a first adjusted threshold associated with the page type, determining a second number of flipped bits using a second adjusted threshold associated with the page type, and generating the third adjusted threshold using the first number of flipped bits and the second number of flipped bits.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: January 6, 2015
    Assignee: SK hynix memory solutions inc.
    Inventors: Yingquan Wu, Marcus Marrow
  • Publication number: 20150006981
    Abstract: A storage system includes a channel detector, an LDPC decoder, and an erasure block. The channel detector is configured to receive data corresponding to data read from a storage and output an LLR signal. The LDPC decoder is configured to receive the LLR signal and output a feedback signal to the channel detector. The erasure block is configured to erase at a portion of at least one of the LLR signal and the feedback signal. A method for testing includes generating an error rate function corresponding to an erasure pattern. The function is a function of a number of LDPC iterations. The method includes determining testing parameters at least in part based on the error rate function, wherein the testing parameters comprise a testing number of LDPC iterations, a passing error rate, and the erasure pattern. The method includes testing storage devices using the testing parameters.
    Type: Application
    Filed: June 6, 2014
    Publication date: January 1, 2015
    Inventors: Yu Kou, Lingqi Zeng, Jason Bellorado, Marcus Marrow
  • Patent number: 8924833
    Abstract: An analog front end is adjusted by determining a signal quality based at least in part on digital sample(s). If the signal quality satisfies one or more criteria, a data independent gain gradient and a data independent offset gradient are selected to adjust the analog front end, where the two gradients are generated without taking into consideration an instantaneous value of an expected signal. If the signal quality does not satisfy the criteria, a decision directed gain gradient and a decision directed offset gradient are selected to adjust the analog front end, where the two gradients are generated based at least in part on decision(s).
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: December 30, 2014
    Assignee: SK hynix memory solutions inc.
    Inventors: Zheng Wu, Jason Bellorado, Marcus Marrow