Abstract: This disclosure is directed to circuits and techniques for protecting a body diode of a power switch from an inductive load when the power switch is turned OFF. A driver circuit may detect whether the power switch is in a desaturation mode when the power switch is turned ON and disable the power switch in response to detecting that the power switch is in the desaturation mode. In addition, the driver circuit may detect whether the body diode of the power switch needs protection when the power switch is turned OFF, and in response to detecting that the body diode needs protection, control the power switch according to a body diode protection scheme.

Abstract: In some examples, a device is arranged to include a galvanic isolation barrier between first and second voltage domains. The device includes first and second capacitors arranged across the galvanic isolation barrier. The first and second capacitors are configured to communicate differential signals between the first and second domains. The device also includes a common mode suppression circuit arranged in the second voltage domain and configured to suppress a common mode signal communicated by the first and second capacitors. The common mode suppression circuit include a first passive RLC filter circuit coupled between the first capacitor and a low-impedance node. The common mode suppression circuit also includes a second passive RLC filter circuit coupled between the second capacitor and a low-impedance node.

Abstract: A circuit arrangement comprises: a primary coil and a secondary coil, which are inductively coupled, but galvanically isolated from one another; a first voltage divider which is connected between a first terminal and a second terminal of the secondary coil and which has a center tap connected to a ground node; a second voltage divider, which is connected between the first terminal and the second terminal of the secondary coil; and an active circuit, which is connected to the first terminal and the second terminal of the secondary coil, a center tap of the second voltage divider and to the ground node. The active circuit is configured to provide a current path between the first terminal of the secondary coil and the ground node and between the second terminal of the secondary coil and the ground node depending on a voltage at the center tap of the second voltage divider.

Abstract: A multi-sense circuit includes a transistor circuit having sense nodes and a gate node, a peak detector having inputs coupled to the sense nodes of the transistor circuit and an output, and a control circuit having a gate control node coupled to the gate node of the transistor circuit and an overcurrent protection node coupled to the output of the peak detector.

Abstract: A circuit is provided that comprises a transformer having a first coil, which is arranged on a substrate, a second coil, which is arranged above the first coil on the substrate, and a dielectric between the first coil and the second coil. The circuit furthermore comprises a resonant circuit, which is couplable to the first coil and/or the second coil to form a resonant loop, wherein a measure of a characteristic frequency of the resonant loop and/or a measure of a power consumption of the resonant loop is able to be tapped off at an output of the resonant circuit. A corresponding method is also provided.

Abstract: A circuit is provided, comprising a transformer having a first coil that is arranged on a substrate and a second coil that is arranged on the substrate above the first coil, and a dielectric between the first coil and the second coil. The circuit furthermore comprises a guard ring around the transformer. The circuit furthermore comprises a diagnostic circuit (55) that is configured so as to ground the guard ring in a normal operating mode and to measure a measurement voltage or a measurement current at a measurement impedance between the guard ring and the ground potential in a diagnostic operating mode.

Abstract: A driver circuit associated with a power electronic system is disclosed. The driver circuit comprises a gate driver circuit configured to drive a switching circuit comprising a plurality of switches in parallel, each switch comprising a respective source bondwire. The driver circuit further comprises a bondwire fault detection circuit comprising a gate charge estimation circuit configured to measure a parameter of the switching circuit comprising a gate charge of the switching circuit or a parameter indicative of the gate charge associated with the switching circuit. The bondwire fault detection circuit further comprises a detection circuit configured to detect a fault associated with at least one source bondwire of the switching circuit, based on the measured parameter of the switching circuit.

Abstract: A driver circuit associated with a power electronic system is disclosed. The driver circuit comprises a gate driver circuit configured to drive a switching circuit comprising a plurality of switches in parallel, each switch comprising a respective source bondwire. The driver circuit further comprises a bondwire fault detection circuit comprising a gate charge estimation circuit configured to measure a parameter of the switching circuit comprising a gate charge of the switching circuit or a parameter indicative of the gate charge associated with the switching circuit. The bondwire fault detection circuit further comprises a detection circuit configured to detect a fault associated with at least one source bondwire of the switching circuit, based on the measured parameter of the switching circuit.

Abstract: A multi-sense circuit includes a transistor circuit having sense nodes and a gate node, a peak detector having inputs coupled to the sense nodes of the transistor circuit and an output, and a control circuit having a gate control node coupled to the gate node of the transistor circuit and an overcurrent protection node coupled to the output of the peak detector.

Abstract: A gate driver is described that includes a gate signal module configured to output a gate signal of the gate driver for driving a gate terminal of a semiconductor device. The gate driver further includes a test module configured to generate a simulated failure condition at a semiconductor device during a test of a monitoring and protection feature of the gate driver. The gate drier further includes a monitor module configured to output an indication of the simulated failure condition in response to detecting the simulated failure condition at the semiconductor device.

Abstract: A signal reception arrangement includes a receiver circuit having a receiver input configured to be coupled to a secondary winding of a transformer of a first communication channel, a first output for providing a data output signal, and a second output. The receiver circuit is configured to evaluate a signal level at the receiver input and to detect a signal transmission when the signal level reaches a given threshold, and generate a feedback signal dependent on a detection of the signal transmission.

Abstract: In accordance with an embodiment, a sender circuit is configured to be coupled to a receiver circuit and generate a drive signal dependent on a data input signal received by the sender circuit at a first input and dependent on at least one drive signal generation parameter. The sender circuit is further configured to adjust the at least one drive signal generation parameter dependent on a feedback signal received at a second input.

Abstract: A gate driver is described that includes a gate signal module configured to output a gate signal of the gate driver for driving a gate terminal of a semiconductor device. The gate driver further includes a test module configured to generate a simulated failure condition at a semiconductor device during a test of a monitoring and protection feature of the gate driver. The gate drier further includes a monitor module configured to output an indication of the simulated failure condition in response to detecting the simulated failure condition at the semiconductor device.

Abstract: A circuit for a semiconductor switching element including a transformer. One embodiment provides a first voltage supply circuit having a first oscillator. A first transformer is connected downstream of the first oscillator. A first accumulation circuit for providing a first supply voltage is connected downstream of the first transformer. A driver circuit having input terminals for feeding in the first supply voltage and having output terminals for providing a drive voltage for the semiconductor switching element, designed to generate the drive voltage for the semiconductor switching element at least from the first supply voltage.

Abstract: A circuit arrangement with a transmission arrangement is disclosed including a transformer.

Abstract: A circuit arrangement is provided, including a storage circuit and an output circuit. The storage circuit is configured to provide a first output signal and a second output signal. The output circuit is configured to receive the first output signal and the second output signal and configured to provide an output signal having one of a first signal level and a second signal level, and to only switch from the first signal level to the second signal level if the difference between the first output signal and the second output signal exceeds a threshold. The circuit arrangement is configured to hold the first output signal and the second output signal independent of a difference between the first output signal and the second output signal after the switching has been carried out.

Abstract: A circuit for a semiconductor switching element including a transformer. One embodiment provides a first voltage supply circuit having a first oscillator. A first transformer is connected downstream of the first oscillator. A first accumulation circuit for providing a first supply voltage is connected downstream of the first transformer. A driver circuit having input terminals for feeding in the first supply voltage and having output terminals for providing a drive voltage for the semiconductor switching element, designed to generate the drive voltage for the semiconductor switching element at least from the first supply voltage.

Abstract: In accordance with an embodiment, a method of operating a gate driving circuit includes monitoring a signal integrity at an output of the gate driving circuit. If the signal integrity is poor based on the monitoring, output of the gate driving circuit is placed in a high impedance state and an external signal integrity failure signal is asserted.

Abstract: A circuit arrangement is provided, including a storage circuit and an output circuit. The storage circuit is configured to provide a first output signal and a second output signal. The output circuit is configured to receive the first output signal and the second output signal and configured to provide an output signal having one of a first signal level and a second signal level, and to only switch from the first signal level to the second signal level if the difference between the first output signal and the second output signal exceeds a threshold. The circuit arrangement is configured to hold the first output signal and the second output signal independent of a difference between the first output signal and the second output signal after the switching has been carried out.

Abstract: A circuit for a semiconductor switching element including a transformer. One embodiment provides a first voltage supply circuit having a first oscillator. A first transformer is connected downstream of the first oscillator. A first accumulation circuit for providing a first supply voltage is connected downstream of the first transformer. A driver circuit having input terminals for feeding in the first supply voltage and having output terminals for providing a drive voltage for the semiconductor switching element, designed to generate the drive voltage for the semiconductor switching element at least from the first supply voltage.