Patents by Inventor Maria Estacio

Maria Estacio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070132077
    Abstract: The invention provides a flip chip molded leadless package (MLP) with electrical paths printed in conducting ink. The MLP includes a taped leadframe with a plurality of leads and a non-conducting tape placed thereon. The electrical paths are printed on the tape to connect the features of the semiconductor device to the leads and an encapsulation layer protects the package. In a second embodiment, the MLP includes a pre-molded leadframe with the electrical paths printed directly thereon. The present invention also provides a method of fabricating the semiconductor package according to each embodiment.
    Type: Application
    Filed: February 28, 2006
    Publication date: June 14, 2007
    Inventors: Seung-Yong Choi, Ti Shian, Maria Estacio
  • Publication number: 20050275089
    Abstract: An integrated circuit assembly includes a lead frame having a plurality of leads with inner portions. A thermally-conductive clip member is bonded to the inner portions of the leads such that the clip member is electrically isolated from and yet thermally coupled to the lead frame. An integrated circuit die is bonded and thereby thermally coupled to the clip member. The die is electrically connected to the wire die by wire bonds. Encapsulant material is disposed over the inner portions of the leads and at least a portion of the clip member, and encapsulates the die and the wire bonds.
    Type: Application
    Filed: June 9, 2004
    Publication date: December 15, 2005
    Inventors: Rajeev Joshi, Maria Estacio, David Chong, B. H. Gooi, Stephen Martin
  • Publication number: 20050104168
    Abstract: Provided are a molded leadless package, and a sawing type molded leadless package and method of manufacturing same. The molded leadless package includes a lead frame pad having first and second surfaces opposite to each other. A semiconductor chip is adhered to the first surface of the lead frame pad. A lead is electrically coupled to the semiconductor chip. A molding material covers the lead frame pad, the semiconductor chip, and the lead and exposes a portion of the lead and a portion of the second surface of the lead frame pad. A step difference is formed between a surface of the molding material covering the second surface of the lead frame pad and the second surface of the lead frame pad itself. The sawing type molded leadless package includes a short-circuit preventing member that is post-shaped or convex, and protruding from the lower surface of the die pad.
    Type: Application
    Filed: November 12, 2004
    Publication date: May 19, 2005
    Inventors: Yoon-hwa Choi, Shi-baek Nam, O-seob Jeon, Rajeev Joshi, Maria Estacio