Patents by Inventor Mariette Awad
Mariette Awad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10210202Abstract: A user performs a gesture with a hand-held or wearable device capable of sensing its own orientation. Orientation data, in the form of a sequence of rotation vectors, is collected throughout the duration of the gesture. To construct a trace representing the shape of the gesture and the direction of device motion, the orientation data is processed by a robotic chain model with four or fewer degrees of freedom, simulating a set of joints moved by the user to perform the gesture (e.g., a shoulder and an elbow). To classify the gesture, a trace is compared to contents of a training database including many different users' versions of the gesture and analyzed by a learning module such as support vector machine.Type: GrantFiled: November 6, 2017Date of Patent: February 19, 2019Assignee: Intel CorporationInventors: Nicolas G. Mitri, Christopher B. Wilkerson, Mariette Awad
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Publication number: 20180196847Abstract: A user performs a gesture with a hand-held or wearable device capable of sensing its own orientation. Orientation data, in the form of a sequence of rotation vectors, is collected throughout the duration of the gesture. To construct a trace representing the shape of the gesture and the direction of device motion, the orientation data is processed by a robotic chain model with four or fewer degrees of freedom, simulating a set of joints moved by the user to perform the gesture (e.g., a shoulder and an elbow). To classify the gesture, a trace is compared to contents of a training database including many different users' versions of the gesture and analyzed by a learning module such as support vector machine.Type: ApplicationFiled: November 6, 2017Publication date: July 12, 2018Inventors: Nicolas G. Mitri, Christopher B. Wilkerson, Mariette Awad
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Patent number: 9811555Abstract: A user performs a gesture with a hand-held or wearable device capable of sensing its own orientation. Orientation data, in the form of a sequence of rotation vectors, is collected throughout the duration of the gesture. To construct a trace representing the shape of the gesture and the direction of device motion, the orientation data is processed by a robotic chain model with four or fewer degrees of freedom, simulating a set of joints moved by the user to perform the gesture (e.g., a shoulder and an elbow). To classify the gesture, a trace is compared to contents of a training database including many different users' versions of the gesture and analyzed by a learning module such as support vector machine.Type: GrantFiled: September 27, 2014Date of Patent: November 7, 2017Assignee: Intel CorporationInventors: Nicholas G. Mitri, Christopher B. Wilkerson, Mariette Awad
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Publication number: 20160092504Abstract: A user performs a gesture with a hand-held or wearable device capable of sensing its own orientation. Orientation data, in the form of a sequence of rotation vectors, is collected throughout the duration of the gesture. To construct a trace representing the shape of the gesture and the direction of device motion, the orientation data is processed by a robotic chain model with four or fewer degrees of freedom, simulating a set of joints moved by the user to perform the gesture (e.g., a shoulder and an elbow). To classify the gesture, a trace is compared to contents of a training database including many different users' versions of the gesture and analyzed by a learning module such as support vector machine.Type: ApplicationFiled: September 27, 2014Publication date: March 31, 2016Inventors: Nicholas Mitri, Chris Wilkerson, Mariette Awad
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Patent number: 9043889Abstract: In one embodiment, the invention is a method and apparatus for secure and reliable computing. One embodiment of an end-to-end security system for protecting a computing system includes a processor interface coupled to at least one of an application processor and an accelerator of the computing system, for receiving requests from the at least one of the application processor and the accelerator, a security processor integrating at least one embedded storage unit and connected to the processor interface with a tightly coupled memory unit for performing at least one of: authenticating, managing, monitoring, and processing the requests, and a data interface for communicating with a display, a network, and at least one embedded storage unit for securely holding at least one of data and programs used by the at least one of the application processor and the accelerator.Type: GrantFiled: March 6, 2013Date of Patent: May 26, 2015Assignee: International Business Machines CorporationInventors: Mariette Awad, Deanna C. Lim, Pascal A. Nsame, Daneyand J. Singley, Sebastian T. Ventrone
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Patent number: 8424071Abstract: In one embodiment, the invention is a method and apparatus for secure and reliable computing. One embodiment of an end-to-end security system for protecting a computing system includes a processor interface coupled to at least one of an application processor and an accelerator of the computing system, for receiving requests from the at least one of the application processor and the accelerator, a security processor integrating at least one embedded storage unit and connected to the processor interface with a tightly coupled memory unit for performing at least one of: authenticating, managing, monitoring, and processing the requests, and a data interface for communicating with a display, a network, and at least one embedded storage unit for securely holding at least one of data and programs used by the at least one of the application processor and the accelerator.Type: GrantFiled: November 19, 2009Date of Patent: April 16, 2013Assignee: International Business Machines CorporationInventors: Mariette Awad, Deanna C. Lim, Pascal A. Nsame, Daneyand J. Singley, Sebastian T. Ventrone
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Patent number: 8341428Abstract: A system and method for protecting computing systems, and more particularly a system and method which a dedicated hardware component configured to communicate with a protection program. A computer hardware subsystem includes a memory comprising content. The content is at least a list of files which have been modified within a predetermined period of time. The list of files is a subset of files of a hard drive. A dedicated hardware component is configured to track the files which have been modified and provide a location of the files to the memory. A communication link between the dedicated hardware component and a protection program provides the protection program with the subset of files of the hard drive as referenced by the memory content.Type: GrantFiled: June 25, 2007Date of Patent: December 25, 2012Assignee: International Business Machines CorporationInventors: Elie Awad, Mariette Awad, Adam E. Trojanowski, Sebastian T. Ventrone
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Patent number: 7962322Abstract: A design structure comprising elements that when processed in a computer-aided design system generates a machine-executable representation of a circuit that compensates for variances in the resistance of the buried resistor during operation of the integrated circuit using a waveform that is representative of the thermal characteristics of the buried resistor.Type: GrantFiled: June 9, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Elie Awad, Mariette Awad, Kai Di Feng
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Patent number: 7886237Abstract: A method in a computer-aided design system for generating a functional design model of a circuit that compensates for changes in resistance of a buried resistor by using a waveform that is representative of the thermal characteristics of the buried resistor.Type: GrantFiled: June 9, 2008Date of Patent: February 8, 2011Assignee: International Business Machines CorporationInventors: Elie Awad, Mariette Awad, Kai Di Feng
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Publication number: 20100269166Abstract: In one embodiment, the invention is a method and apparatus for secure and reliable computing. One embodiment of an end-to-end security system for protecting a computing system includes a processor interface coupled to at least one of an application processor and an accelerator of the computing system, for receiving requests from the at least one of the application processor and the accelerator, a security processor integrating at least one embedded storage unit and connected to the processor interface with a tightly coupled memory unit for performing at least one of: authenticating, managing, monitoring, and processing the requests, and a data interface for communicating with a display, a network, and at least one embedded storage unit for securely holding at least one of data and programs used by the at least one of the application processor and the accelerator.Type: ApplicationFiled: November 19, 2009Publication date: October 21, 2010Applicant: International Business Machines CorporationInventors: Mariette Awad, Deanna C. Lim, Pascal A. Nsame, Dancyand J. Singley, Sebastian T. Ventrone
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Patent number: 7666712Abstract: A semiconductor structure comprising a substrate including a first layer comprising a first material having a first modulus of elasticity; a first structure comprising a conductor and formed within the substrate, the first structure having an upper surface; and a stress diverting structure proximate the first structure and within the first layer, the stress diverting structure providing a low mechanical stress region at the upper surface of the first structure when a physical load is applied to the first structure, wherein said low mechanical stress region comprises stress values below the stress values in areas not protected by the stress diverting structure. The stress diverting structure comprises a second material having a second modulus of elasticity less than the first modulus of elasticity, the second material selectively formed over the upper surface of the first structure for diverting mechanical stress created by the physical load applied to the first structure.Type: GrantFiled: June 5, 2008Date of Patent: February 23, 2010Assignee: International Business Machines CorporationInventors: Elie Awad, Mariette A. Awad, Kai D. Feng
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Patent number: 7595681Abstract: A method and apparatus that compensates for variances in the resistance of the buried resistor during operation of the integrated circuit using a waveform that is representative of the thermal characteristics of the buried resistor.Type: GrantFiled: May 19, 2006Date of Patent: September 29, 2009Assignee: International Business Machines CorporationInventors: Elie Awad, Mariette Awad, Kai Feng
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Publication number: 20090119772Abstract: In one method, the embodiments herein providing secure file access when a user opens an application and uses the application to make a request to open a data file on a secure file system. The method checks a trusted application list, by kernel extension, to determine if the application comprises a trusted application. The method also checks the user's permission to access the secure file system. The embodiments herein pass an “extended” permission to any applications that are trusted applications. Therefore, the methods herein control access to the secure file system based not only on the user's permission, but also on the “extended” permission, such that the kernel extension allows access to files. With embodiments herein, the trusted application performs the extended permission management.Type: ApplicationFiled: November 6, 2007Publication date: May 7, 2009Inventors: Mariette Awad, Adam E. Trojunowski
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Patent number: 7489038Abstract: A semiconductor structure comprising a substrate including a first layer comprising a first material having a first modulus of elasticity; a first structure comprising a conductor and formed within the substrate, the first structure having an upper surface; and a stress diverting structure proximate the first structure and within the first layer, the stress diverting structure providing a low mechanical stress region at the upper surface of the first structure when a physical load is applied to the first structure, wherein said low mechanical stress region comprises stress values below the stress values in areas not protected by the stress diverting structure. The stress diverting structure comprises a second material having a second modulus of elasticity less than the first modulus of elasticity, the second material selectively formed over the upper surface of the first structure for diverting mechanical stress created by the physical load applied to the first structure.Type: GrantFiled: September 7, 2005Date of Patent: February 10, 2009Assignee: International Business Machines CorporationInventors: Elie Awad, Mariette A. Awad, Kai D. Feng
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Publication number: 20080320423Abstract: A system and method for protecting computing systems, and more particularly a system and method which a dedicated hardware component configured to communicate with a protection program. A computer hardware subsystem includes a memory comprising content. The content is at least a list of files which have been modified within a predetermined period of time. The list of files is a subset of files of a hard drive. A dedicated hardware component is configured to track the files which have been modified and provide a location of the files to the memory. A communication link between the dedicated hardware component and a protection program provides the protection program with the subset of files of the hard drive as referenced by the memory content. The invention is also directed to a design structure on which a circuit resides.Type: ApplicationFiled: October 17, 2007Publication date: December 25, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Elie Awad, Mariette Awad, Adam E. Trojanowski, Sebastian T. Ventrone
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Publication number: 20080320313Abstract: A system and method for protecting computing systems, and more particularly a system and method which a dedicated hardware component configured to communicate with a protection program. A computer hardware subsystem includes a memory comprising content. The content is at least a list of files which have been modified within a predetermined period of time. The list of files is a subset of files of a hard drive. A dedicated hardware component is configured to track the files which have been modified and provide a location of the files to the memory. A communication link between the dedicated hardware component and a protection program provides the protection program with the subset of files of the hard drive as referenced by the memory content.Type: ApplicationFiled: June 25, 2007Publication date: December 25, 2008Inventors: Elie Awad, Mariette Awad, Adam E. Trojanowski, Sebastian T. Ventrone
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Publication number: 20080233681Abstract: A semiconductor structure comprising a substrate including a first layer comprising a first material having a first modulus of elasticity; a first structure comprising a conductor and formed within the substrate, the first structure having an upper surface; and a stress diverting structure proximate the first structure and within the first layer, the stress diverting structure providing a low mechanical stress region at the upper surface of the first structure when a physical load is applied to the first structure, wherein said low mechanical stress region comprises stress values below the stress values in areas not protected by the stress diverting structure. The stress diverting structure comprises a second material having a second modulus of elasticity less than the first modulus of elasticity, the second material selectively formed over the upper surface of the first structure for diverting mechanical stress created by the physical load applied to the first structure.Type: ApplicationFiled: June 5, 2008Publication date: September 25, 2008Applicant: International Business Machines CorporationInventors: Elie Awad, Mariette A. Awad, Kai D. Feng
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Publication number: 20080234997Abstract: A design structure comprising elements that when processed in a computer-aided design system generates a machine-executable representation of a circuit that compensates for variances in the resistance of the buried resistor during operation of the integrated circuit using a waveform that is representative of the thermal characteristics of the buried resistor.Type: ApplicationFiled: June 9, 2008Publication date: September 25, 2008Inventors: Elie Awad, Mariette Awad, Kai Di Feng
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Publication number: 20070268735Abstract: A method and apparatus that compensates for variances in the resistance of the buried resistor during operation of the integrated circuit using a waveform that is representative of the thermal characteristics of the buried resistor.Type: ApplicationFiled: May 19, 2006Publication date: November 22, 2007Inventors: Elie Awad, Mariette Awad, Kai Feng
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Patent number: 7071559Abstract: A semiconductor structure comprising a substrate including a first layer comprising a first material having a first modulus of elasticity; a first structure comprising a conductor and formed within the substrate, the first structure having an upper surface; and a stress diverting structure proximate the first structure and within the first layer, the stress diverting structure providing a low mechanical stress region at the upper surface of the first structure when a physical load is applied to the first structure, wherein said low mechanical stress region comprises stress values below the stress values in areas not protected by the stress diverting structure. The stress diverting structure comprises a second material having a second modulus of elasticity less than the first modulus of elasticity, the second material selectively formed over the upper surface of the first structure for diverting mechanical stress created by the physical load applied to the first structure.Type: GrantFiled: July 16, 2004Date of Patent: July 4, 2006Assignee: International Business Machines CorporationInventors: Elie Awad, Mariette A. Awad, Kai D. Feng