Patents by Inventor Mario F. Velez

Mario F. Velez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9496255
    Abstract: A chipset includes a sheet of glass, quartz or sapphire and a first wafer having at least one first circuit layer on a first side of a first substrate layer. The first wafer is connected to the sheet such that the at least one first circuit layer is located between the first substrate layer and the sheet. A second wafer having at least one second circuit layer on a first side of a second substrate layer is connected to the first substrate layer such that the at least one second circuit layer is located between the second substrate layer and the first substrate layer. Also a method of forming a chipset.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: November 15, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Chengjie Zuo, Changhan Yun, Sang-June Park, Chi Shun Lo, Mario F. Velez, Jonghae Kim
  • Patent number: 9431510
    Abstract: Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: August 30, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Changhan Yun, Chengjie Zuo, Chi Shun Lo, Jonghae Kim, Mario F. Velez
  • Patent number: 9379802
    Abstract: A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: June 28, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Chengjie Zuo, Changhan Yun, Chi Shun Lo, Mario F. Velez, Jonghae Kim
  • Patent number: 9008602
    Abstract: A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: April 14, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Chengjie Zuo, Changhan Yun, Chi Shun Lo, Mario F. Velez, Jonghae Kim
  • Patent number: 8907450
    Abstract: Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: December 9, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Changhan Yun, Chengjie Zuo, Chi Shun Lo, Jonghae Kim, Mario F. Velez
  • Publication number: 20130295866
    Abstract: A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 7, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Chengjie Zuo, Changhan Yun, Chi Shun Lo, Mario F. Velez, Jonghae Kim
  • Publication number: 20130207745
    Abstract: Three-dimensional (3D) Radio Frequency (RF) inductor-capacitor (LC) band pass filters having through-glass-vias (TGVs). One such L-C filter circuit includes a glass substrate, a first portion of a first inductor formed on a first surface of the glass substrate, a second portion of the first inductor formed on a second surface of the glass substrate, and a first set of TGVs configured to connect the first and second portions of the first inductor. Additionally the L-C filter circuit can include a second inductor similar to the first inductor, and a metal-insulator-metal (MIM) capacitor formed between the first and second inductor, such that the first and second inductor are coupled through the MIM capacitor.
    Type: Application
    Filed: March 14, 2012
    Publication date: August 15, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Changhan Yun, Chengjie Zuo, Chi Shun Lo, Jonghae Kim, Mario F. Velez
  • Publication number: 20130120951
    Abstract: A chipset includes a sheet of glass, quartz or sapphire and a first wafer having at least one first circuit layer on a first side of a first substrate layer. The first wafer is connected to the sheet such that the at least one first circuit layer is located between the first substrate layer and the sheet. A second wafer having at least one second circuit layer on a first side of a second substrate layer is connected to the first substrate layer such that the at least one second circuit layer is located between the second substrate layer and the first substrate layer. Also a method of forming a chipset.
    Type: Application
    Filed: January 24, 2012
    Publication date: May 16, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Chengjie Zuo, Changhan Yun, Sang-June Park, Chi Shun Lo, Mario F. Velez, Jonghae Kim
  • Publication number: 20130113076
    Abstract: Methods and apparatus for metal semiconductor wafer bonding for high-Q devices are provided. An exemplary capacitor includes a first plate formed on a glass substrate, a second plate, and a dielectric layer. No organic bonding agent is used between the first plate and the glass substrate, and the dielectric layer can be an intrinsic semiconductor. A extrinsic semiconductor layer that is heavily doped contacts the dielectric layer. The dielectric and extrinsic semiconductor layers are sandwiched between the first and second plates. An intermetallic layer is formed between the first plate and the dielectric layer. The intermetallic layer is thermo compression bonded to the first plate and the dielectric layer. The capacitor can be coupled in a circuit as a high-Q capacitor and/or a varactor, and can be integrated with a mobile device.
    Type: Application
    Filed: November 9, 2011
    Publication date: May 9, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Changhan YUN, Chengjie Zuo, Chi Shun Lo, Jonghae Kim, Mario F. Velez
  • Patent number: 5454270
    Abstract: A differential pressure sensor (10) has a sensor die (16) attached to a stress isolation package base (12) with a bonding glass (27) having a similar coefficient of thermal expansion. The bonding glass, and alternately an aluminum layer, provides a hermetic seal between the stress isolation base and sensor die. Pressure is applied to the sensor die port (24). A plastic housing (14) is attached to the stress isolation base with an adhesive (29). A port (23) in the plastic housing is filled with a silicone gel (22). A second pressure source is transferred by way of the silicone gel to the sensor die. Any hostile chemical entering the via contacts the first surface of the sensor die to assert pressure against a transducer circuit (25) to generate the electrical signals representative of the applied pressure but are isolated from the sensitive interconnects by the hermetic seal.
    Type: Grant
    Filed: June 6, 1994
    Date of Patent: October 3, 1995
    Assignee: Motorola, Inc.
    Inventors: Clem H. Brown, Daniel J. Wallace, Jr., Mario F. Velez