Abstract: A system and method for advertisement sponsored content distribution. It enables a person to experience advertising embedded content free of charge or to experience advertising free content plus an alternative advertising presentation for a consideration. This requires use of a special, system compatible playback device/program which must support alternative presentation capabilities (such as audio, still images, video, messages, etc.).

Abstract: A system and method for advertisement sponsored content distribution. It enables a person to experience advertising embedded content free of charge or to experience advertising free content plus an alternative advertising presentation for a consideration. This requires use of a special, system compatible playback device/program which must support alternative presentation capabilities (such as audio, still images, video, messages, etc.).

Abstract: System and method for secure electronic rights management, secure transaction management and content distribution. This invention ensures that content can be used or experienced by the end user only if an appropriate license has been obtained. Content owners prepare content for release in the system and make it available in electronic or physical form. Prior to purchase of the license, the user sends an offer request to the system. The system replies by providing all possible offers (or selected offers based on predefined criteria) through which the license can be purchased. Each offer represents a path from the content owner to the terminal. By selecting one path, the user initiates the license request process. Upon execution of the transaction, the license is securely stored within the user's personal license management device. The user's personal usage device communicates with the user's license management device so that only licensed content can be used/experienced.

Abstract: A fully pipelined VLSI circuit structure for implementing the JPEG baseline image compression standard. The circuit structure exploits the principles of pipelining and parallelism to the maximum extent in order to obtain high speed and throughput. The entire is designed to be implemented on a single VLSI chip to yield a clock rate of about 100 MHz which would allow an input rate of 30 frames per second for 1024.times.1024 color images.