Patents by Inventor Marius Enachescu

Marius Enachescu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6714017
    Abstract: A method and system for detecting electrical short circuit defects in a plate structure of a flat panel display, for example, a field emission display (FED) is disclosed. In one embodiment, the process first applies a stimulation to the electrical conductors of the plate structure. Next, the process creates an infra-red thermal mapping of a cathode region of the FED. For example, an infra-red array may be used to snap a picture of the cathode of the FED. Then, the process analyzes the infra-red thermal mapping to determine a region of the FED which contains the electrical short circuit defect. Another embodiment localizes the defect to one sub-pixel by performing an infra-red mapping of the region which the previous IR mapping process determined to contain the electrical short circuit defect. Then, the process analyzes this infra-red mapping to determine a sub-pixel of the FED which contains the electrical short circuit defect.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: March 30, 2004
    Assignees: Candescent Technologies Corporation, Candescent Intellectual Property Services, Inc.
    Inventors: Marius Enachescu, Sergey Belikov, Stephen F. Meier
  • Publication number: 20020093354
    Abstract: A method and system for detecting electrical short circuit defects in a plate structure of a flat panel display, for example, a field emission display (FED). In one embodiment, the process first applies a stimulation to the electrical conductors of the plate structure. Next, the process creates an infra-red thermal mapping of a cathode region the FED. For example, an infra-red array may be used to snap a picture of the cathode of the FED. Then, the process analyzes the infra-red thermal mapping to determine a region of the FED which contains the electrical short circuit defect. Another embodiment localizes the defect to one sub-pixel by performing an infra-red mapping of the region which the previous IR mapping process determined to contain the electrical short circuit defect. Then, the process analyzes this infra-red mapping to determine a sub-pixel of the FED which contains the electrical short circuit defect.
    Type: Application
    Filed: November 30, 2000
    Publication date: July 18, 2002
    Inventors: Marius Enachescu, Sergey Belikov, Stephen F. Meier