Abstract: A power electronic module is provided that includes an electrical connection on opposing surfaces of an electronic component that allows a high current path from a top board to a bottom board through the body of the electronic component thus improving the power electronic module's electrical resistance and reducing the current load on the connector structure which is located between the first substrate and the second substrate. The power electronic module further includes a semiconductor component positioned on an external surface of the top board which allows for thermal contact of the semiconductor component with an external heat sink thus providing an efficient system thermal management via a reduced heat dissipation path. Additional heat dissipation can be obtained by disposing a metallic spacer on the semiconductor component of the power electronic module of the present disclosure.

Abstract: A power electronic module is provided that includes an electrical connection on opposing surfaces of an electronic component that allows a high current path from a top board to a bottom board through the body of the electronic component thus improving the power electronic module's electrical resistance and reducing the current load on the connector structure which is located between the first substrate and the second substrate. The power electronic module further includes a semiconductor component positioned on an external surface of the top board which allows for thermal contact of the semiconductor component with an external heat sink thus providing an efficient system thermal management via a reduced heat dissipation path. Additional heat dissipation can be obtained by disposing a metallic spacer on the semiconductor component of the power electronic module of the present disclosure.

Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.

Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.

Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.

Abstract: One embodiment is directed towards an encapsulated device. The encapsulated device includes a device, and a first encapsulation covering the device. The first encapsulation has one or more exterior surfaces. One or more recesses in one or more of the exterior surfaces is configured to receive a second encapsulation.

Abstract: A method of making a lead finish incorporating mechanically flattening the plated coating of metal leads. This may be accomplished by mechanical means such as rolling, stamping, peening, coining, forging, or other suitable flattening techniques.

Abstract: A method of making a lead finish incorporating mechanically flattening the plated coating of metal leads. This may be accomplished by mechanical means such as rolling, stamping, peening, coining, forging, or other suitable flattening techniques.

Abstract: A method of plasma cleaning semiconductor wafers for subsequent soldering the dice cut from the semiconductor wafers to a substrate. The plasma cleaning removes all contaminants such that the semiconductor dice has improved solderability.

Abstract: A pallet for conveying a plurality of ceramic leadless chip carriers (LCC) through an automated wave soldering machine. The pallet includes recesses formed to receive and contain the LDD's with the lid of the LCC facing into the recess. This results in protecting the lids from the molten solder. Additionally, the recesses are formed in a diamond orientation with a solderable pin placed at the trailing apex of each recess. Both the pin and the diamond orientation prevents solder build up on the trailing conductive pads, resulting in enhancing the coplanarity of the solder on the pads.

Abstract: The lead finish can be greatly improved on leaded electronic components in a vapor phase reflow process without extra process steps by providing an improved conveyor belt having supports for carrying the components in bug down orientation while preventing the leads from substantially protruding through the plane of the conveyor mechanism and simultaneously allowing for the free flow of the heated vapor through the conveyor belt and on top of the belts such that the leads of the electronic components rest on the tape. The remaining portion of the belt is of a large grid mesh to permit the free flow of vapors in the upper portion of the reflow chamber.