Abstract: Embodiments of a power stage for a direct current (DC)-DC converter and a DC-DC converter are disclosed. In an embodiment, a power stage for a DC-DC converter includes an input terminal from which input power of the DC-DC converter with an input DC voltage is received, a high-side segment connected between the input DC voltage and an output signal of the power stage, and a low-side segment connected between the output signal of the power stage and ground. At least one of the high-side segment and the low-side segment includes stacked transistors having isolation terminals that are biased to reduce substrate injection.

Abstract: One example discloses a power management circuit, including: a voltage reference circuit including a bandgap circuit coupled to and configured by a first trimming circuit; an undervoltage lockout (UVLO) circuit coupled to and configured by a second trimming circuit; wherein the first trimming circuit and the second trimming circuit are configured to receive a single trim control setting.

Abstract: One example discloses a power management circuit, including: a voltage reference circuit including a bandgap circuit coupled to and configured by a first trimming circuit; an undervoltage lockout (UVLO) circuit coupled to and configured by a second trimming circuit; wherein the first trimming circuit and the second trimming circuit are configured to receive a single trim control setting.

Abstract: A method and apparatus are described for fabricating a microchip structure (60A) which includes a first chip (41) that is affixed to a lead frame strip (11-18) having a plurality of lead frame pads (11-16) in a circuit mounting area (19) and a planar lead frame inductor coil (17) that is laterally displaced from the circuit mounting area (19), where molded body (61) encapsulates the first chip (41), lead frame pads (11-16) and planar lead frame inductor coil (17).

Abstract: A method for multiphase frequency to voltage conversion includes generating for each cycle of an oscillating input, one of a plurality of non-overlapping clocks. A respective voltage in proportion to an input frequency of the oscillating input, is generated in response to each of the non-overlapping clocks, with a respective one of a plurality of frequency to voltage converters. Each of the respective voltages is summated to generate a voltage sum proportional to the input frequency.

Abstract: A method for multiphase frequency to voltage conversion includes generating for each cycle of an oscillating input, one of a plurality of non-overlapping clocks. A respective voltage in proportion to an input frequency of the oscillating input, is generated in response to each of the non-overlapping clocks, with a respective one of a plurality of frequency to voltage converters. Each of the respective voltages is summated to generate a voltage sum proportional to the input frequency.

Abstract: A rotatable forkend connection system is provided that includes a shank and a forkend connector. The shank is fixedly coupled to a device member and extends within the device member along a longitudinal axis of the device member. The shank includes a protrusion extending from the shank in a direction perpendicular to the longitudinal axis of the device member. The forkend connector is rotatably coupled to the shank and has an axis of rotation coaxial with the longitudinal axis of the device member. The forkend connector includes a recess configured to receive the protrusion. The protrusion and the recess are configured to restrain the forkend connector from moving along the longitudinal axis of the device member.

Abstract: A method for high-speed voltage level translation includes biasing a high-voltage (HV) gate of an HV transistor to an intermediate voltage with a bias device. A low-voltage (LV) transistor is activated with a positive voltage transition applied to an LV gate of the LV transistor, wherein the HV transistor is connected in series between an output and an LV drain of the LV transistor. The intermediate voltage is bootstrapped to a bootstrapped voltage in response to the positive voltage transition on the LV gate coupled to the HV gate through a capacitor therebetween. The output is discharged. A time constant, defined by a resistance of the bias device and a capacitance of the capacitor, is greater than a minimum time constant, thereby maintaining the bootstrapped voltage on the HV gate at or above a drive voltage for a minimum period to discharge the output to a minimum voltage.

Abstract: A method for dynamic calibration of current sense for switching converters includes biasing a reference transistor with a Zero Temperature Coefficient current source, and a respective gate of each of the reference transistor and a power transistor with a gate voltage. The reference transistor and the power transistor each comprise a matching temperature coefficient. A reference voltage sensed across the reference transistor is multiplied by a gain, thereby generating a first calibration voltage, wherein the gain is determined by a gain coefficient. A transistor voltage sensed across the power transistor is multiplied by the gain, thereby generating a second calibration voltage. The first calibration voltage is compared to a target voltage to generate an error voltage. The gain coefficient is determined with an Analog to Digital Converter in response to the error voltage, thereby minimizing a difference between the target voltage and each of the calibration voltages.

Abstract: A method for dynamic calibration of current sense for switching converters includes biasing a reference transistor with a Zero Temperature Coefficient current source, and a respective gate of each of the reference transistor and a power transistor with a gate voltage. The reference transistor and the power transistor each comprise a matching temperature coefficient. A reference voltage sensed across the reference transistor is multiplied by a gain, thereby generating a first calibration voltage, wherein the gain is determined by a gain coefficient. A transistor voltage sensed across the power transistor is multiplied by the gain, thereby generating a second calibration voltage. The first calibration voltage is compared to a target voltage to generate an error voltage. The gain coefficient is determined with an Analog to Digital Converter in response to the error voltage, thereby minimizing a difference between the target voltage and each of the calibration voltages.

Abstract: A method for high-speed voltage level translation includes biasing a high-voltage (HV) gate of an HV transistor to an intermediate voltage with a bias device. A low-voltage (LV) transistor is activated with a positive voltage transition applied to an LV gate of the LV transistor, wherein the HV transistor is connected in series between an output and an LV drain of the LV transistor. The intermediate voltage is bootstrapped to a bootstrapped voltage in response to the positive voltage transition on the LV gate coupled to the HV gate through a capacitor therebetween. The output is discharged. A time constant, defined by a resistance of the bias device and a capacitance of the capacitor, is greater than a minimum time constant, thereby maintaining the bootstrapped voltage on the HV gate at or above a drive voltage for a minimum period to discharge the output to a minimum voltage.

Abstract: A method of fabricating a truss section is provided. Cross-bars are connected to truss chords, each cross-bar extending between an associated pair of truss chords, the cross-bars located adjacent to an end of the truss section. An end plate is coupled to the cross-bars after the cross-bars have been connected to their truss chords. The end plate has apertures and ear portions. Each ear portion extends from the end plate to cover an end of a truss chord. The apertures align with corresponding apertures in an end plate of an adjacent truss section. The apertures receive connectors that also pass through the corresponding apertures to fixedly couple the two truss sections. The method may also include coupling a rig bar between truss chords. The rig bar may receive a removable coupler to suspend the truss from above.

Abstract: A truss section is provided that includes a plurality of chords and a solid rig bar. The rig bar extends between two of the chords and is fixedly coupled at one end to one of the two chords and at its other end to the other chord. The rig bar includes an aperture that can receive a removable coupler that is operable to suspend the truss from above. First and second pluralities of cross-bars extend between pairs of chords, the first cross-bars located adjacent to one end of the truss section and the second cross-bars adjacent to the other end. First and second end plates are fixedly coupled to the cross-bars. The end plates each have a plurality of apertures and a plurality of ear portions. The ear portions extend to cover the ends of the chords. The pluralities of apertures are configured to align with apertures in an adjacent truss section and to receive connectors to fixedly couple the truss sections together.

Abstract: An engine test stand assembly includes an elongated front support having a pair of coupling sleeves mounted thereon. The coupling sleeves are coupled to a pair of elongated lateral supports. A pair of receiving members is positioned on the front support to receive ends of an engine hoist to stabilize the hoist with respect to the front support. Each of the lateral supports has one of a pair of vertical mounts attached thereto. The vertical mounts support post members to secure the post members to an associated one of the lateral supports. A pair of engine supports each includes a top end and bottom end. The bottom ends engage the front support and the top ends of the engine supports are abuttable against an engine to hold the engine above the front support. A pair of lower supports mounted on the post members is engageable with the engine.

Abstract: A connector for readily fabricating trusses or scaffolding for use in temporary, demountable construction which cooperate with elongated support members to fabricate modular box trusses.