Abstract: A baseband signal-conditioning architecture applicable to radio receivers uses switched-capacitor techniques to provide high-performance signal conditioning in low-voltage, deep-submicron processes (e.g., 65 nm and below). In the architecture, a first mixer is coupled to an antenna receiving the signal, and outputs a first mixer output signal based on the signal received by the antenna. A buffer coupled to an output of the first mixer outputs a buffer signal based on the first mixer output signal. A first charge pump is coupled to an output of the buffer, and produces a first charge pump output signal based on the buffer signal. In some examples, a second charge pump is coupled to the output of the first mixer and produces a second charge pump output signal based on the first mixer output signal, and the buffer input is coupled to an output of the second charge pump.

Abstract: An integrated circuit includes circuitry organized into sub-blocks, and power supply selection circuitry operative to selectively adjust the connectivity of power supply terminals of the sub-blocks. When the integrated circuit is operating in an active mode, the power supply selection circuitry couples the sub-blocks in parallel between upper and lower active-mode power supplies; when the integrated circuit is operating in a standby mode, the power supply selection circuitry couples two or more sub-blocks in series between upper and lower standby-mode power supplies. Additionally, in standby mode, isolation circuitry within a sub-block is activated to isolate circuitry within the sub-block from input or output terminals of the sub-block.

Abstract: A frequency synthesizer directly generates phase modulated radio-frequency (RF) signals. The frequency synthesizer includes a voltage controlled oscillator (VCO) producing a synthesized frequency signal having a frequency controlled based on a signal received at an input of the VCO. A digitally adjustable frequency divider produces a reduced frequency signal from the synthesized frequency signal. A phase digital-to-analog converter (DAC) produces a delayed version of a timing signal (e.g., the reduced frequency signal, or a reference clock signal) that is delayed according to a digital control signal. A phase detector (PD) produces a phase control signal from the reduced frequency signal and/or the delayed timing signal. A digital signal converter controls the digitally adjustable frequency divider and the phase DAC so as to cause a phase or frequency of the synthesized frequency signal output by the VCO to track a desired phase or frequency trajectory encoded in a digital signal.

Abstract: A system for synchronizing nodes in a wireless network comprises a first node and a second node. The first node comprising a transmitter, a receiver, and a first time keeper. The second node comprising a transmitter, a receiver, a second time keeper, a timing error measurer for making a timing error measurement between the first time keeper and the second time keeper. The second timekeeper is adjusted to target minimizing the timing error measurement.

Abstract: Low-power circuits for providing stable voltage and current references rely on currents flowing through ultra-thin dielectric layer components for operation. A current reference circuit includes driving circuitry operative to apply a voltage to the first terminal of the component with respect to the second terminal of the component in order to cause a current to flow through the dielectric layer, and sources a reference output current that is based on the current flow through the dielectric layer in response to the applied voltage. A voltage reference circuit includes a current source which applies a current to the ultra-thin dielectric layer component, and maintains an output node at a stable reference output voltage level based on the voltage across the ultra-thin dielectric layer component in response to the current flow through the dielectric layer.

Abstract: A system for synchronizing nodes in a wireless network comprises a first node and a second node. The first node comprising a transmitter, a receiver, and a first time keeper. The second node comprising a transmitter, a receiver, a second time keeper, a timing error measurer for making a timing error measurement between the first time keeper and the second time keeper. The second timekeeper is adjusted to target minimizing the timing error measurement.

Abstract: A sampling circuit, such as the sampling circuit of a successive approximation analog-to-digital converter (ADC), provides anti-aliasing filtering of a sampled input signal. The circuit samples the input signal using multiple capacitors, wherein each capacitor samples the input signal at a distinct time during a sampling time interval. The circuit combines the samples stored on different capacitors during a conversion time interval, and generates a digital output signal using the combined samples. In one example, a first bit of the output signal is generated using a sample stored on a first capacitor, and second bit of the output signal is generated using a sample stored on a second capacitor. In another example, the circuitry performs finite or infinite impulse response (FIR or IIR) filtering of the input signal, where a filter characteristic is determined by the relative sizes of the capacitors used for sampling.

Abstract: A sampling circuit, such as the sampling circuit of a successive approximation analog-to-digital converter (ADC), provides anti-aliasing filtering of a sampled input signal. The circuit samples the input signal using multiple capacitors, wherein each capacitor samples the input signal at a distinct time during a sampling time interval. The circuit combines the samples stored on different capacitors during a conversion time interval, and generates a digital output signal using the combined samples. In one example, a first bit of the output signal is generated using a sample stored on a first capacitor, and second bit of the output signal is generated using a sample stored on a second capacitor. In another example, the circuitry performs finite or infinite impulse response (FIR or IIR) filtering of the input signal, where a filter characteristic is determined by the relative sizes of the capacitors used for sampling.

Abstract: A precision temperature sensing system includes a heater and a sensing element disposed on a semiconductor substrate. A power source drives the heater on a periodic basis according to a received clock signal. The sensing element senses the heat emitted by the heater and diffused through the semiconductor substrate. Processing circuitry coupled to the sensing element adjusts a phase of the periodic heater driving signal based on the heat sensed by the sensing element. The processing circuitry determines a temperature based on a thermal diffusivity (TD) of the semiconductor substrate, the adjusted value of the phase, and a known distance between the heater and the sensing element. A second temperature sensor can be disposed on the same substrate as the precision temperature sensing system, and calibrated based on temperature measurements obtained while applying a reference frequency signal to the precision sensing system.

Abstract: Low-power circuits for providing stable voltage and current references rely on currents flowing through ultra-thin dielectric layer components for operation. A current reference circuit includes driving circuitry operative to apply a voltage to the first terminal of the component with respect to the second terminal of the component in order to cause a current to flow through the dielectric layer, and sources a reference output current that is based on the current flow through the dielectric layer in response to the applied voltage. A voltage reference circuit includes a current source which applies a current to the ultra-thin dielectric layer component, and maintains an output node at a stable reference output voltage level based on the voltage across the ultra-thin dielectric layer component in response to the current flow through the dielectric layer.

Abstract: A system for maintaining synchronization of nodes in a wireless network comprises a child node and a parent node. The child node comprising a transmitter, a receiver, and a first time keeper. The parent node comprising a transmitter, a receiver, a second time keeper. The parent node receiver is active for a guardband and wherein the guardband is adjusted to maintain synchronization of the parent node with the child node.

Abstract: A method and device for receiving a wireless signal is provided. The device includes a passive mixer having a first input node, a second input node, and at least one output node. An oscillator is coupled to the first input node of the mixer. The output of a buffer is coupled to the second input node of the mixer. An antenna is operatively coupled to the input node of the buffer. The buffer is configured to provide isolation from the mixer.

Abstract: Phase noise in a first clock signal is measured using a time to digital converter (TDC) by determining variations in the phase delay between the first clock signal and a second clock signal. The TDC can include first and second series interconnections of delay elements, first and second sets of latches, and processing circuitry coupled to the latches and configured to determine the phase delay. The TDC can include a series interconnection of delay elements, latches, and circuitry configured to selectively adjust the control signal connected to the delay elements based on the output of the latches. The phase noise measurement can be used in a sampling circuit, so as to produce a second data signal from a first data signal based on the first clock signal and the measured phase noise.

Abstract: An integrated circuit includes circuitry organized into sub-blocks, and power supply selection circuitry operative to selectively adjust the connectivity of power supply terminals of the sub-blocks. When the integrated circuit is operating in an active mode, the power supply selection circuitry couples the sub-blocks in parallel between upper and lower active-mode power supplies; when the integrated circuit is operating in a standby mode, the power supply selection circuitry couples two or more sub-blocks in series between upper and lower standby-mode power supplies. Additionally, in standby mode, isolation circuitry within a sub-block is activated to isolate circuitry within the sub-block from input or output terminals of the sub-block.

Abstract: A modulator for modulating a radio frequency signal comprises a voltage controlled oscillator, a first feedback path, and a second feedback path. The first feedback path is coupled between a detector output and the voltage controlled oscillator. The second feedback path is coupled between the detector output and the voltage controlled oscillator. The detector is coupled to a divided down output of the voltage controlled oscillator and a reference clock.

Abstract: A circuit including at least one low voltage input, at least one high voltage output, and a field transistor having a source, a drain and a control region. The circuit may comprise a high-voltage amplifier. In this embodiment, an electrical connection between the high-voltage output terminal and the field transistor control region, and an electrical connection between the input terminal and a second transistor. Various embodiments of the field transistor are described.

Abstract: A circuit including at least one low voltage input, at least one high voltage output, and a field transistor having a source, a drain and a control region. The circuit may comprise a high-voltage amplifier. In this embodiment, an electrical connection between the high-voltage output terminal and the field transistor control region, and an electrical connection between the input terminal and a second transistor. Various embodiments of the field transistor are described.

Abstract: A comb-finger microstructure is disclosed for use in optical switching arrays, beam steering, optical displays, disk drive head actuators and the like. The microstructure is capable of producing linear or nonlinear actuation forces, perpendicular to the surface of a chip in which the microactuator is formed, as a function of applied voltages. The microstructure further provides the ability to detect the position of a movable structure with respect to a stationary or anchored structure.