Patents by Inventor Mark Crooks

Mark Crooks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11980896
    Abstract: Aggregate processing systems, methods, and apparatus are described. In some embodiments, a plant is configurable in one of a plurality of configurations.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: May 14, 2024
    Assignee: Superior Industries, Inc.
    Inventors: Doug Lambert, Mark Crooks, Lafe Grimm, Matthew Gordon
  • Patent number: 11786937
    Abstract: Aggregate processing systems, methods, and apparatus are described. In some embodiments, a plant is configurable in one of a plurality of configurations, e.g. by sliding one of a plurality of chutes, hoppers, or flumes into a frame and/or by modifying a height of the frame. In some embodiments, a roller floor assembly is in a maintenance configuration when a chute is in a maintenance position. In some embodiments, a flume includes one or more diverters for moving a subset of material from one side of the flume to another.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: October 17, 2023
    Assignee: Superior Industries, Inc.
    Inventors: Doug Lambert, Mark Crooks, Lafe Grimm, Matt Gordon
  • Publication number: 20230271192
    Abstract: Aggregate processing systems, methods and apparatus are described. Some embodiments include a plurality of equipment criteria sensors, product quantity sensors, product characteristic sensors, and/or actuators. Some embodiments include a control system incorporating algorithm logic. Some embodiments include a control system incorporating artificial intelligence logic.
    Type: Application
    Filed: May 4, 2023
    Publication date: August 31, 2023
    Inventors: Danilo Bibancos, John Rodriguez, Lafe Grimm, Matthew Gordon, Mark Crooks, Troy Plattner
  • Publication number: 20220288603
    Abstract: Aggregate processing systems, methods, and apparatus are described. In some embodiments, a plant is configurable in one of a plurality of configurations.
    Type: Application
    Filed: March 9, 2022
    Publication date: September 15, 2022
    Inventors: Doug Lambert, Mark Crooks, Lafe Grimm, Matthew Gordon
  • Patent number: 11355346
    Abstract: A method of processing a semiconductor wafer includes depositing a silicon layer on the semiconductor wafer. The silicon layer has a substantially uniform thickness. The silicon layer is polished to smooth the silicon layer such that the thickness is substantially uniform after polishing.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: June 7, 2022
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Guoqiang David Zhang, Mark Crooks, Tracy Michelle Ragan
  • Publication number: 20210197230
    Abstract: Aggregate processing systems, methods, and apparatus are described. In some embodiments, a plant is configurable in one of a plurality of configurations, e.g. by sliding one of a plurality of chutes, hoppers, or flumes into a frame and/or by modifying a height of the frame. In some embodiments, a roller floor assembly is in a maintenance configuration when a chute is in a maintenance position. In some embodiments, a flume includes one or more diverters for moving a subset of material from one side of the flume to another.
    Type: Application
    Filed: August 28, 2019
    Publication date: July 1, 2021
    Inventors: Doug Lambert, Mark Crooks, Lafe Grimm, Matt Gordon
  • Publication number: 20200312671
    Abstract: A method of processing a semiconductor wafer includes depositing a silicon layer on the semiconductor wafer. The silicon layer has a substantially uniform thickness. The silicon layer is polished to smooth the silicon layer such that the thickness is substantially uniform after polishing.
    Type: Application
    Filed: June 15, 2020
    Publication date: October 1, 2020
    Inventors: Guoqiang David Zhang, Mark Crooks, Tracy Michelle Ragan
  • Patent number: 10699908
    Abstract: A method of processing a semiconductor wafer includes depositing a silicon layer on the semiconductor wafer. The silicon layer has a substantially uniform thickness. The silicon layer is polished to smooth the silicon layer such that the thickness is substantially uniform after polishing.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: June 30, 2020
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Guoqiang David Zhang, Mark Crooks, Tracy Michelle Ragan
  • Publication number: 20180151384
    Abstract: A method of processing a semiconductor wafer includes depositing a silicon layer on the semiconductor wafer. The silicon layer has a substantially uniform thickness. The silicon layer is polished to smooth the silicon layer such that the thickness is substantially uniform after polishing.
    Type: Application
    Filed: May 26, 2016
    Publication date: May 31, 2018
    Inventors: Guoqiang David Zhang, Mark Crooks, Tracy Michelle Ragan
  • Publication number: 20070256750
    Abstract: A centraliser for centring one pipe within another comprises a plurality of skids which extend outwards from the outer surface of an inner pipe into contact with the inner surface of an outer pipe The skids are independent of one another and are secured to the outer surface of a pipe with the skids extending radially from the pipe surface. The skids have apertures to receive a securing band or bands which can be passed around the pipe, received in the apertures of the skids and tensioned to secure the skids to the pipe surface.
    Type: Application
    Filed: March 30, 2007
    Publication date: November 8, 2007
    Applicant: U.W.G. Limited
    Inventor: Mark CROOK
  • Publication number: 20070158696
    Abstract: A semiconductor integrated circuit structure and method for fabricating. The semiconductor integrated circuit structure includes a light sensitive device integral with a semiconductor substrate, a cover dielectric layer disposed over the light sensitive device, and a lens-formation dielectric layer disposed over the cover dielectric layer. Light is transmittable through the cover dielectric layer; and through the lens-formation dielectric layer. The lens-formation dielectric layer forms an embedded convex microlens. The microlens directs light onto the light sensitive device.
    Type: Application
    Filed: March 12, 2007
    Publication date: July 12, 2007
    Inventors: Chintamani Palsule, John Stanback, Thomas Dungan, Mark Crook
  • Publication number: 20070020920
    Abstract: A method for fabricating a low leakage integrated circuit structure. An antireflective layer is disposed without intervening layers directly onto the top of an interconnect conductor, and a dielectric layer is disposed over the antireflective layer. The interconnect conductor is aluminum; the antireflective layer is titanium nitride, and the antireflective layer has thickness less than or equal to 650 angstroms and greater than or equal to 150 angstroms. A contact window is opened with the contact window extending at least down to the antireflective layer.
    Type: Application
    Filed: September 22, 2006
    Publication date: January 25, 2007
    Inventors: Chintamani Palsule, Jay Meyer, John Stanback, Jeremy Theil, Mark Crook, Kirk Lindahl
  • Publication number: 20060099800
    Abstract: A method for fabricating a low leakage integrated circuit structure. An antireflective layer is disposed without intervening layers directly onto the top of an interconnect conductor, and a dielectric layer is disposed over the antireflective layer. The interconnect conductor is aluminum; the antireflective layer is titanium nitride, and the antireflective layer has thickness less than or equal to 650 angstroms and greater than or equal to 150 angstroms. A contact window is opened with the contact window extending at least down to the antireflective layer.
    Type: Application
    Filed: November 9, 2004
    Publication date: May 11, 2006
    Inventors: Chintamani Palsule, Jay Meyer, John Stanback, Jeremy Theil, Mark Crook, Kirk Lindahl
  • Publication number: 20060097244
    Abstract: A semiconductor integrated circuit structure and method for fabricating. The semiconductor integrated circuit structure includes a light sensitive device integral with a semiconductor substrate, a cover dielectric layer disposed over the light sensitive device, and a lens-formation dielectric layer disposed over the cover dielectric layer. Light is transmittable though the cover dielectric layer; and through the lens-formation dielectric layer. The lens-formation dielectric layer forms an embedded convex microlens. The microlens directs light onto the light sensitive device.
    Type: Application
    Filed: November 9, 2004
    Publication date: May 11, 2006
    Inventors: Chintamani Palsule, John Stanback, Thomas Dungan, Mark Crook