Abstract: Systems, devices, structures, and methods are provided to allow resources to be shared among a plurality of processors. An exemplary system includes a mechanism to grant exclusive control of a resource to a processor, while at the same time, the fast memory of such a processor is maintained in a coherent state. An exemplary structure includes data structures that help to identify the portion of the fast memory of the processor to be maintained in a coherent state. An exemplary method includes a determination of past and present processors that have had access to the resource so as to maintain the coherency of the fast memory of the processor.

Abstract: A method for controlling a transmitter for a serial data port is provided. The method includes receiving a set of data at the serial data port. The data in the set of data is compared with a selected pattern of bits. When data in the set of data matches the selected pattern of bits, a bit in a register is set. When the bit in the register is set, transmissions stop. The method further includes processing the set of data to determine a flow control state. When processing the set of data determines that the flow control state is a first state, transmissions re-start.

Abstract: A method is described for controlling commands and data in a serial data stream received by a serial controller in a serial interface. A character count register is programed with a maximum number of characters that a serial controller will send to a direct memory access controller (DMAC) before sending an end of frame (EOF) indication. Characters in an incoming data stream are counted using the character count register. An EOF signal is passed to the DMAC after the maximum number of characters programmed in the character count register have been written to a direct memory access (DMA) buffer. The character count register is reset any time the serial controller passes an EOF to the DMAC. In one embodiment, a character is programmed into a match register. Data in an incoming data stream is compared with the character in the match register. When a character in the incoming data stream matches the character programmed in the match register, a match bit is set corresponding to the match register.

Abstract: A method and apparatus for storing and retrieving data from a queue implemented on a computer system. A queue memory structure is allocated in a memory device, the queue including a a last-in-fast-out (LIFO) and a first-in-first-out (FIFO). A data element is atomically added to the LIFO when the data element is enqueued to the queue structure, and a data element is atomically removed from the FIFO when the data element is to be dequeued from the queue, thus preventing concurrent processes from disordering the data in the queue. When the FIFO becomes empty, the LIFO is converted to a new FIFO, and this new FIFO is stored in place of the old (empty) FIFO. In one embodiment, a lock is set and the LIFO is converted to a new FIFO only when the lock is previously determined to be clear to prevent additional dequeuers from interrupting a dequeuing process. A high-priority data element can be atomically added to a head list that stores the data element at the front of the queue memory structure.

Abstract: A self-terminating network of stations connected by coaxial cable segments with each cable segment having ends with cable connectors for coupling to matching device connecters. Each connector has a switchable termination circuit de-activated by coupling to a matching connector. An uncoupled connector will serve as a terminator. The device connector can be a tap connector for mounting on a printed circuit board, for minimizing the length of the tap, and reducing the distrubance to an attached coaxial cable network.