Patents by Inventor Mark Dancho
Mark Dancho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11436153Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device is comprised of a controller, a random access memory (RAM) unit, and a NVM unit, wherein the NVM unit is comprised of a plurality of zones. The RAM unit comprises a first logical to physical address table and the NVM unit comprises a second logical to physical address table. The zones are partitioned into sections, and each partitioned section aligns with a change log table. Data is written to each zone sequentially, and only one partitioned section is updated at a time for each zone. Each time a zone is erased or written to in the NVM unit, the first logical to physical address table is updated and the second logical to physical address table is periodically updated to match the first logical to physical address table.Type: GrantFiled: May 26, 2020Date of Patent: September 6, 2022Assignee: Western Digital Technologies, Inc.Inventors: Daniel L. Helmick, Mark Dancho, Ryan R. Jones
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Publication number: 20210374067Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device is comprised of a controller, a random access memory (RAM) unit, and a NVM unit, wherein the NVM unit is comprised of a plurality of zones. The RAM unit comprises a first logical to physical address table and the NVM unit comprises a second logical to physical address table. The zones are partitioned into sections, and each partitioned section aligns with a change log table. Data is written to each zone sequentially, and only one partitioned section is updated at a time for each zone. Each time a zone is erased or written to in the NVM unit, the first logical to physical address table is updated and the second logical to physical address table is periodically updated to match the first logical to physical address table.Type: ApplicationFiled: May 26, 2020Publication date: December 2, 2021Applicant: Western Digital Technologies, Inc.Inventors: Daniel L. HELMICK, Mark DANCHO, Ryan R. JONES
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Patent number: 10546648Abstract: A storage control system, and a method of operation thereof, including: a recycle write queue for providing a recycle write; a host write queue for providing a host write; and a scheduler, coupled to the recycle write queue and the host write queue, for scheduling the recycle write and the host write for writing to a memory device.Type: GrantFiled: April 12, 2013Date of Patent: January 28, 2020Assignee: SANDISK TECHNOLOGIES LLCInventors: James M. Higgins, James M. Kresse, Ryan Jones, Mark Dancho
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Patent number: 10108470Abstract: Apparatuses, systems, methods, and computer program products are disclosed for parity storage management. A system includes a plurality of storage elements. A system includes a controller that selects a parity storage element from a plurality of storage elements. A parity storage element has an error rate higher than other elements of a plurality of storage elements, and the parity storage element stores parity data for the plurality of storage elements.Type: GrantFiled: December 28, 2015Date of Patent: October 23, 2018Assignee: SanDisk Technologies LLCInventors: Gulzar A. Kathawala, Shuenghee Park, Jingfeng Yuan, Mark Dancho
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Patent number: 9747157Abstract: A method of operation of a data storage system includes: monitoring a data interface bus, the monitoring by a non-volatile memory controller; activating a zero bit counter for detecting a ratio of 1's to 0's on the data interface bus; and adjusting a threshold voltage (Vth), based on the ratio of the 1's to the 0's from the zero bit counter, by the non-volatile memory controller.Type: GrantFiled: November 8, 2013Date of Patent: August 29, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Robert W. Ellis, James M. Higgins, Mark Dancho
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Publication number: 20170185472Abstract: Apparatuses, systems, methods, and computer program products are disclosed for parity storage management. A system includes a plurality of storage elements. A system includes a controller that selects a parity storage element from a plurality of storage elements. A parity storage element has an error rate higher than other elements of a plurality of storage elements, and the parity storage element stores parity data for the plurality of storage elements.Type: ApplicationFiled: December 28, 2015Publication date: June 29, 2017Applicant: SanDisk Technologies, Inc.Inventors: Gulzar A. Kathawala, Shuenghee Park, Jingfeng Yuan, Mark Dancho
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Patent number: 9665295Abstract: Systems, methods and/or devices are used to enable dynamic erase block grouping. In one aspect, the method includes (1) maintaining metadata for each erase block of a plurality of erase blocks in a data storage system, wherein a respective metadata for a respective erase block includes one or more characteristics of the respective erase block, (2) allocating a set of erase blocks, of the plurality of erase blocks, as unassociated erase blocks, (3) selecting two or more unassociated erase blocks in accordance with characteristics of the unassociated erase blocks so as to select unassociated erase blocks with similar characteristics, and (4) grouping the two or more unassociated erase blocks with similar characteristics to form a super block.Type: GrantFiled: August 26, 2016Date of Patent: May 30, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: James Fitzpatrick, Mark Dancho, James M. Higgins, Robert W. Ellis, Bernardo Rub
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Patent number: 9652381Abstract: Systems, methods and/or devices are used to enable garbage collection of a sub-block of an individually erasable block of a storage medium in a storage device. In one aspect, the method includes determining a first trigger parameter in accordance with one or more operating conditions of a first sub-block of an erase block in the storage medium, and determining a second trigger parameter in accordance with one or more operating conditions of a second sub-block of the erase block in the storage medium. In accordance with a determination that the first trigger parameter meets a first vulnerability criterion, garbage collection of the first sub-block is enabled. Furthermore, in accordance with a determination that the second trigger parameter meets a second vulnerability criterion, garbage collection of the second sub-block is enabled.Type: GrantFiled: June 20, 2014Date of Patent: May 16, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: James M. Higgins, James Fitzpatrick, Mark Dancho
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Patent number: 9582211Abstract: A method of operation in a non-volatile memory system for deferring, in accordance with a determination to reduce power consumption by the non-volatile memory system, execution of commands in a command queue corresponding to a distinct set of non-volatile memory devices during a respective wait period. In some implementations, the respective wait period for a first distinct set of non-volatile memory devices in at least two distinct sets is at least partially non-overlapping with the respective wait period for a second distinct set of non-volatile memory devices in the at least two distinct sets.Type: GrantFiled: December 16, 2014Date of Patent: February 28, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Robert W. Ellis, James M. Higgins, Mark Dancho
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Patent number: 9575677Abstract: The various embodiments described herein include methods and/or systems for throttling power in a storage device. In one aspect, a method of operation in a storage system includes obtaining a power metric corresponding to a count of active memory commands in the storage system, where active memory commands are commands being executed by the storage system. The method further includes, in accordance with a determination that the power metric satisfies one or more power thresholds, deferring execution of one or more pending memory commands.Type: GrantFiled: December 16, 2014Date of Patent: February 21, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: Robert W. Ellis, James M Higgins, Mark Dancho, Ryan R. Jones
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Patent number: 9543025Abstract: A storage control system, and a method of operation thereof, including: a power-down module for powering off a memory sub-system; a decay estimation module, coupled to the power-down module, for estimating a power-off decay rate upon the memory sub-system powered up, the power-off decay rate is for indicating how much data in the memory sub-system has decayed while the memory sub-system has been powered down; and a recycle module, coupled to the decay estimation module, for recycling an erase block for data retention based on the power-off decay rate.Type: GrantFiled: April 11, 2013Date of Patent: January 10, 2017Assignee: SANDISK TECHNOLOGIES LLCInventors: James Fitzpatrick, James M. Higgins, Bernardo Rub, Ryan Jones, Robert W. Ellis, Mark Dancho, Sheunghee Park
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Publication number: 20160364155Abstract: Systems, methods and/or devices are used to enable dynamic erase block grouping. In one aspect, the method includes (1) maintaining metadata for each erase block of a plurality of erase blocks in a data storage system, wherein a respective metadata for a respective erase block includes one or more characteristics of the respective erase block, (2) allocating a set of erase blocks, of the plurality of erase blocks, as unassociated erase blocks, (3) selecting two or more unassociated erase blocks in accordance with characteristics of the unassociated erase blocks so as to select unassociated erase blocks with similar characteristics, and (4) grouping the two or more unassociated erase blocks with similar characteristics to form a super block.Type: ApplicationFiled: August 26, 2016Publication date: December 15, 2016Inventors: James Fitzpatrick, Mark Dancho, James M. Higgins, Robert W. Ellis, Bernardo Rub
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Patent number: 9442662Abstract: The embodiments described herein methods and devices that enhance the endurance of a non-volatile memory (e.g., flash memory). The method includes obtaining, for each of the plurality of die, an endurance metric. The method also includes sorting the plurality of die into a plurality of die groups based on their corresponding endurance metrics, where each die group includes one or more die and each die group is associated with a range of endurance metrics. In response to a write command specifying a set of write data, the method further includes writing the write data to the non-volatile memory by writing in parallel subsets of the write data to the one or more die assigned to a single die group of the plurality of die groups.Type: GrantFiled: December 20, 2013Date of Patent: September 13, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Mark Dancho, James Fitzpatrick, Li Li
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Patent number: 9431113Abstract: Systems, methods and/or devices are used to enable dynamic erase block grouping. In one aspect, the method includes (1) maintaining metadata for each erase block of a plurality of erase blocks in a data storage system, wherein a respective metadata for a respective erase block includes one or more characteristics of the respective erase block, (2) allocating a set of erase blocks, of the plurality of erase blocks, as unassociated erase blocks, (3) selecting two or more unassociated erase blocks in accordance with characteristics of the unassociated erase blocks so as to select unassociated erase blocks with similar characteristics, and (4) grouping the two or more unassociated erase blocks with similar characteristics to form a super block.Type: GrantFiled: July 17, 2014Date of Patent: August 30, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: James Fitzpatrick, Mark Dancho, James M. Higgins, Robert W. Ellis, Bernardo Rub
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Patent number: 9361222Abstract: Systems, methods and/or devices are used to enable storage drive life estimation. In one aspect, the method includes (1) determining two or more age criteria of a storage drive, and (2) determining a drive age of the storage drive in accordance with the two or more age criteria of the storage drive.Type: GrantFiled: July 17, 2014Date of Patent: June 7, 2016Assignee: SMART STORAGE SYSTEMS, INC.Inventors: James Fitzpatrick, Mark Dancho, James M. Higgins, James M. Kresse
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Patent number: 9311183Abstract: Systems, methods and/or devices are used to adapt a target charge to equalize bit errors across page types for a storage medium, such as flash memory, in a storage system. In one aspect, the method includes performing a sequence of operations, including: (1) determining a first target charge, a second target charge, and a third target charge, the first, second, and third target charges used for controlling first, second, and third charge distributions, respectively, in cells of the storage medium when data is written to the cells, wherein the second charge distribution is between the first charge distribution and the third charge distribution, (2) determining a first error indicator for lower/fast pages of the storage medium, (3) determining a second error indicator for upper/slow pages of the storage medium, and (4) adjusting the second target charge in accordance with the first error indicator and the second error indicator.Type: GrantFiled: January 13, 2015Date of Patent: April 12, 2016Assignee: SANDISK ENTERPRISE IP LLCInventors: James Fitzpatrick, Li Li, Mark Dancho, James R. Tylock
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Publication number: 20150370701Abstract: Systems, methods and/or devices are used to enable garbage collection of a sub-block of an individually erasable block of a storage medium in a storage device. In one aspect, the method includes determining a first trigger parameter in accordance with one or more operating conditions of a first sub-block of an erase block in the storage medium, and determining a second trigger parameter in accordance with one or more operating conditions of a second sub-block of the erase block in the storage medium. In accordance with a determination that the first trigger parameter meets a first vulnerability criterion, garbage collection of the first sub-block is enabled. Furthermore, in accordance with a determination that the second trigger parameter meets a second vulnerability criterion, garbage collection of the second sub-block is enabled.Type: ApplicationFiled: June 20, 2014Publication date: December 24, 2015Inventors: James M. Higgins, James Fitzpatrick, Mark Dancho
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Patent number: 9183137Abstract: A method of operation of a storage control system includes: calculating a throttle threshold; identifying a detection point based on the throttle threshold; and calculating a number of write/erase cycles based on the detection point and the throttle threshold for writing a memory device.Type: GrantFiled: February 27, 2013Date of Patent: November 10, 2015Assignee: SMART STORAGE SYSTEMS, INC.Inventors: Jacob Schmier, Mark Dancho, James M Higgins, Ryan Jones, Robert W Ellis
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Publication number: 20150309752Abstract: The various embodiments described herein include methods and/or systems for throttling power in a storage device. In one aspect, a method of operation in a storage system includes obtaining a power metric corresponding to a count of active memory commands in the storage system, where active memory commands are commands being executed by the storage system. The method further includes, in accordance with a determination that the power metric satisfies one or more power thresholds, deferring execution of one or more pending memory commands.Type: ApplicationFiled: December 16, 2014Publication date: October 29, 2015Inventors: Robert W. Ellis, James M Higgins, Mark Dancho, Ryan R. Jones
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Publication number: 20150309751Abstract: A method of operation in a non-volatile memory system for deferring, in accordance with a determination to reduce power consumption by the non-volatile memory system, execution of commands in a command queue corresponding to a distinct set of non-volatile memory devices during a respective wait period. In some implementations, the respective wait period for a first distinct set of non-volatile memory devices in at least two distinct sets is at least partially non-overlapping with the respective wait period for a second distinct set of non-volatile memory devices in the at least two distinct sets.Type: ApplicationFiled: December 16, 2014Publication date: October 29, 2015Inventors: Robert W. Ellis, James M. Higgins, Mark Dancho