Abstract: A spinal bone graft includes one or more cortical bone portions forming a first unit. The first unit includes an engagement surface for contacting bone, and a mating surface. The mating surface forms at least one first undercut. The bone graft also includes one or more cortical bone portions forming a second unit. The second unit includes an engagement surface for contacting bone, and a mating surface. The mating surface forms either at least one second undercut, or at least one connector. In the former, at least one connector is received in each of the first and second undercuts to interconnect the first and second units. In the latter, the at least one connector of the second unit is received in the first undercut of the first unit to interconnect the first unit and second unit.

Abstract: Methods for graphics processing are provided. One example method includes executing a plurality of kernels using a plurality of graphics processing units (GPUs), wherein responsibility for executing a corresponding kernel is divided into one or more portions each of which being assigned to a corresponding GPU. The method includes generating a plurality of dependency data at a first kernel as each of a first plurality of portions of the first kernel completes processing. The method includes checking dependency data from one or more portions of the first kernel prior to execution of a portion of a second kernel. The method includes delaying execution of the portion of the second kernel as long as the corresponding dependency data of the first kernel has not been met.

Abstract: An embodiment provides a method, including: obtaining, using a processor, contextual information relating to an information handling device; adjusting, using a processor, an automated speech recognition engine using the contextual information; receiving, at an audio receiver of the information handling device, user speech input; and providing, using a processor, recognized speech based on the user speech input received and the contextual information adjustment to the automated speech recognition engine. Other aspects are described and claimed.

Abstract: A method of and system for gate-level masking of secret data during a cryptographic process is described. A mask share is determined, wherein a first portion of the mask share includes a first number of zero-values and a second number of one-values, and a second portion of the mask share includes the first number of one-values and the second number of zero-values. Masked data values and the first portion of the mask share are input into a first portion of masked gate logic, and the masked data values and the second portion of the mask share are input into a second portion of the masked gate logic. A first output from the first portion of the masked gate logic and a second output from the second portion of the masked gate logic are identified, wherein either the first output or the second output is a zero-value.

Abstract: Aspects of the present disclosure involve implementations that may be used to protect neural network models against adversarial attacks by obfuscating neural network operations and architecture. Obfuscation techniques include obfuscating weights and biases of neural network nodes, obfuscating activation functions used by neural networks, as well as obfuscating neural network architecture by introducing dummy operations, dummy nodes, and dummy layers into the neural networks.

Abstract: Aspects of the present disclosure involve implementations that may be used to protect neural network models against adversarial attacks by obfuscating neural network operations and architecture. Obfuscation techniques include obfuscating weights and biases of neural network nodes, obfuscating activation functions used by neural networks, as well as obfuscating neural network architecture by introducing dummy operations, dummy nodes, and dummy layers into the neural networks.

Abstract: The embodiments disclosed herein relate to intelligent configuration of a cloud-service gateway based on a pattern recognition algorithm. A machine-learning model is trained to learn the patterns of correlation among many configuration parameters affecting the performance of the system when processing an observed or estimated workload. Training the model may be performed off-line with performance data observed during experiments performed with a variety of configurations and workloads. Once trained, the model may be used to recommend: (a) new configuration parameter values based on constraints of the system being configured, (b) an amount of work that can be performed at a certain performance level when the system is configured with certain parameter values, or (c) the expected performance level when running a certain workload on the system configured with certain configuration parameter values.

Abstract: Disclosed are memory encryption systems and methods that rotate encryption keys for robust resistance against side-channel-analysis (SCA)-based attacks on communication paths between an encryption engine within a trust boundary and an external memory component. A key data structure has a plurality of keys that are used to encrypt a plurality of memory blocks in the external memory. The memory blocks encrypted with the oldest key of the key data structure are identified. Encrypted data is read from the identified memory blocks. The encrypted data is decrypted from the identified memory blocks. The data is then re-encrypted using the selected key that is newer than the oldest key, and re-written to the identified memory blocks.

Abstract: An anti-tamper layer is applied to a blank wafer. The layered wafer is then diced into shield dies. A shield die is oxide-to-oxide bonded to the top of an active die such that removing the shield die will damage the active die. The shield die may be sized and positioned such that wirebond pads along one or more edges of the active die remain exposed. The exposed wirebond pads may be used to electrically connect, via wirebonds, the active die to a substrate. A second shield die may be attached to the bottom of the active die to help protect against the use of bottom-to-top delayering.

Abstract: To obtain functional information 110 energising a first set of x-ray emitters of the panel over a first period of time and directing the x-rays at the first object; using the detector to detect the x-rays 35 after passing through the first object; processing the detected x-rays to create a first set of images to obtain tomosynthesis data 100; energising a second set of x-ray emitters of the panel over a second period of time and directing the x-rays at the first object; using the detector to detect the x-rays after passing through the first object; processing the detected x-rays to create a second set of images to obtain tomosynthesis data, wherein the number of emitters used in the second period of time is less than used in the first period of time; and comparing at least some images from each set of images to provide functional information.

Abstract: A method, system and non-transitory computer readable instructions for application patching comprising, concatenating uncompressed data into a continuous data set and dividing the continuous data set into variable sized data chunks. Compressing each of the variable sized data chunks and dividing each of the variable sized data chunks into fixed size data blocks. Encrypting the fixed size data blocks to generate encrypted fixed size data blocks and sending the encrypted fixed size data blocks over a network.

Abstract: In graphics processing data is received representing one or more vertices for a scene in a virtual space. Primitive assembly is performed on the vertices to compute projections of the vertices from virtual space onto a viewport of the scene in a screen space of a display device containing a plurality of pixels, the plurality of pixels being subdivided into a plurality of subsections. Scan conversion determines which pixels of the plurality of pixels are part of each primitive that has been converted to screen space coordinates. Coarse rasterization for each primitive determines which subsection or subsections the primitive overlaps. Metadata associated with the subsection a primitive overlaps determines a pixel resolution for the subsection. The metadata is used in processing pixels for the subsection to generate final pixel values for the viewport of the scene that is displayed on the display device in such a way that parts of the scene in two different subsections have different pixel resolution.

Abstract: Methods for graphics processing are provided. One example method includes executing a plurality of kernels using a plurality of graphics processing units (GPUs), wherein responsibility for executing a corresponding kernel is divided into one or more portions each of which being assigned to a corresponding GPU. The method includes generating a plurality of dependency data at a first kernel as each of a first plurality of portions of the first kernel completes processing. The method includes checking dependency data from one or more portions of the first kernel prior to execution of a portion of a second kernel. The method includes delaying execution of the portion of the second kernel as long as the corresponding dependency data of the first kernel has not been met.

Abstract: A method, system and non-transitory computer readable instructions for update optimization comprising, receiving application metadata wherein the application metadata includes a likelihood of future data change metric for one or more regions of application data. Determining from the application metadata which regions of the application data have a high likelihood of data change and generating variable data chunk boundaries based on the regions of the application data that have the high likelihood of data change.

Abstract: A graphics processing unit (GPU) includes one or more processor cores adapted to execute a software-implemented shader program, and one or more hardware-implemented ray tracing units (RTU) adapted to traverse an acceleration structure to calculate intersections of rays with bounding volumes and graphics primitives. The RTU implements traversal logic to traverse the acceleration structure, stack management, and other tasks to relieve burden on the shader, communicating intersections to the shader which then calculates whether the intersection hit a transparent or opaque portion of the object intersected. Thus, one or more processing cores within the GPU perform accelerated ray tracing by offloading aspects of processing to the RTU, which traverses the acceleration structure within which the 3D environment is represented.

Abstract: A graphics processing unit (GPU) includes one or more processor cores adapted to execute a software-implemented shader program, and one or more hardware-implemented ray tracing units (RTU) adapted to traverse an acceleration structure to calculate intersections of rays with bounding volumes and graphics primitives asynchronously with shader operation. The RTU implements traversal logic to traverse the acceleration structure including transformation of rays as needed to account for variations in coordinate space between levels, stack management, and other tasks to relieve burden on the shader, communicating intersections to the shader which then calculates whether the intersection hit a transparent or opaque portion of the object intersected. Thus, one or more processing cores within the GPU perform accelerated ray tracing by offloading aspects of processing to the RTU, which traverses the acceleration structure within which the 3D environment is represented.

Abstract: In a computer graphics processing unit (GPU) having a texture unit, when pixel sample locations are based on a non-orthonormal grid in scene space, the texture unit receives texture space gradient values directly, e.g., from a shader unit or generates them from texture coordinates supplied, e.g., by a shader unit, and then applies a transformation to the gradient values configured to adjust the gradient values to those which would arise from the use of a orthonormal screen space grid.

Abstract: Described herein is a financial planning system that comprises a Strategic Advice Manager (SAM) module that utilizes an artificial intelligence (AI) module to automate and optimize the financial planning decision-making process, reducing the margin of error created by depending solely on a human-advisor and reducing the time required to build a financial plan, as discussed herein. That is, the financial planning system incorporates artificial intelligence techniques to analyze client inputs and select appropriate financial strategies based on the analysis of the inputs.