Patents by Inventor Mark Gallina

Mark Gallina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972303
    Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: April 30, 2024
    Assignee: Intel Corporation
    Inventors: Carin Ruiz, Bo Qiu, Columbia Mishra, Arijit Chattopadhyay, Chee Lim Nge, Srikanth Potluri, Jianfang Zhu, Deepak Samuel Kirubakaran, Akhilesh Rallabandi, Mark Gallina, Renji Thomas, James Hermerding, II
  • Patent number: 11545410
    Abstract: Enhanced thermal energy transfer systems for semiconductor packages are provided. A thermally conductive member is disposed in the interstitial space between an upper surface of a semiconductor package and a lower surface of a thermal member. The thermally conductive member is disposed above a first portion of the upper surface of the semiconductor package having a relatively higher thermal energy output when the semiconductor package is operating. A thermal interface material is disposed in the interstitial space and a force applied to the thermal member. The thermally conductive member forms a relatively higher pressure region above the first portion of the semiconductor package and a relatively lower pressure region in other portions of the semiconductor package remote from the thermally conductive member. The increased pressure region proximate the thermally conductive member beneficially enhances the flow of thermal energy from the first portion of the semiconductor package to the thermal member.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: January 3, 2023
    Assignee: INTEL CORPORATION
    Inventors: Mark MacDonald, David Pidwerbecki, Mark Gallina, Jerrod Peterson
  • Publication number: 20220114318
    Abstract: Methods and apparatus for in-field thermal calibration are disclosed. A disclosed example apparatus includes instructions, memory in the apparatus, and processor circuitry. The processor circuitry is to execute the instructions to determine that a system on chip (SOC) package is deployed, the SOC package deployed with a default first thermal model, in response to the determination that the SOC package is deployed, monitor at least one temperature of the SOC package from a sensor and power usage of the SOC package, calibrate a second thermal model based on the at least one temperature and the power usage, and publish the calibrated second thermal model for control of the SOC package.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 14, 2022
    Inventors: Mark Gallina, Jianfang Zhu, Kristoffer Fleming, Akhllesh Rallabandi, Jianwei Dai
  • Publication number: 20220114136
    Abstract: Methods, systems, and apparatus to reconfigure a computer are disclosed. An example electronic device includes at least one memory, instructions in the electronic device, and processor circuitry to execute instructions to analyze data corresponding to a first configuration of the electronic device to detect a change associated with the electronic device, the first configuration corresponding to a respective first user profile, determine a second configuration of the electronic device based on the detected change, and adjust a configuration of the electronic device from the first configuration to the second configuration.
    Type: Application
    Filed: December 21, 2021
    Publication date: April 14, 2022
    Inventors: Jianfang Zhu, Ivan Chen, Barnes Cooper, Jianwei Dai, Martin Dixon, Kristoffer Fleming, Mark Gallina, Duncan Glendinning, Deepak Samuel Kirubakaran, Chia-Hung S. Kuo, Yifan Li, Adam Norman, Michael Rosenzweig, Kai P Wang, Jin Yan, Virendra Vikramsinh Adsure
  • Publication number: 20200326994
    Abstract: Methods, apparatus, and systems to dynamically schedule a workload to among compute blocks based on temperature are disclosed. An apparatus to schedule a workload to at least one of a plurality of compute blocks based on temperature includes a prediction engine to determine (i) a first predicted temperature of a first compute block of the plurality of compute blocks and (ii) a second predicted temperature of a second compute block of the plurality of compute blocks. The apparatus also includes a selector to select between the first compute block and the second compute block for assignment of the workload. The selection is based on which of the first and second predicted temperatures is lower. The apparatus further includes a workload scheduler to assign the workload to the selected one of the first or second compute blocks.
    Type: Application
    Filed: June 26, 2020
    Publication date: October 15, 2020
    Inventors: Carin Ruiz, Bo Qiu, Columbia Mishra, Arijit Chattopadhyay, Chee Lim Nge, Srikanth Potluri, Jianfang Zhu, Deepak Samuel Kirubakaran, Akhilesh Rallabandi, Mark Gallina, Renji Thomas, James Hermerding II
  • Patent number: 10305529
    Abstract: Systems and methods may provide for a device including a housing, one or more electronic components positioned within the housing, and a first cured resin composition positioned within the housing, the first cured resin composition including a thermal energy storage material and a first filler material. The device may also include a second cured resin composition positioned within the housing, the second cured resin composition including the thermal energy storage material and a second filler material. The first filler material and the second filler material may be different, wherein the first cured resin composition and the second cured resin composition may encompass at least one of the one or more electronic components. In other examples, the electronic components include a power supply and the device complies with an ATEX equipment directive for explosive atmospheres. Moreover, component underfill and/or assembly overmold processes may be used to fabricate the device.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: May 28, 2019
    Assignee: Intel Corporation
    Inventors: David Pidwerbecki, Mark Gallina, Mark Hemmeyer, Steven Lofland, Ponniah Ilavarasan, Michael Stewart, Kevin Byrd
  • Publication number: 20190139855
    Abstract: Enhanced thermal energy transfer systems for semiconductor packages are provided. A thermally conductive member is disposed in the interstitial space between an upper surface of a semiconductor package and a lower surface of a thermal member. The thermally conductive member is disposed above a first portion of the upper surface of the semiconductor package having a relatively higher thermal energy output when the semiconductor package is operating. A thermal interface material is disposed in the interstitial space and a force applied to the thermal member. The thermally conductive member forms a relatively higher pressure region above the first portion of the semiconductor package and a relatively lower pressure region in other portions of the semiconductor package remote from the thermally conductive member. The increased pressure region proximate the thermally conductive member beneficially enhances the flow of thermal energy from the first portion of the semiconductor package to the thermal member.
    Type: Application
    Filed: December 17, 2018
    Publication date: May 9, 2019
    Applicant: Intel Corporation
    Inventors: Mark MacDonald, David Pidwerbecki, Mark Gallina, Jerrod Peterson
  • Patent number: 9501112
    Abstract: Mobile platforms and methods may provide for an integrated circuit such as a system on chip (SoC), a first heat spreader thermally coupled to the integrated circuit and a phase change material configuration thermally coupled to the first heat spreader. The integrated circuit may include logic to operate the integrated circuit in a performance burst mode according to a duty cycle, wherein the performance burst mode causes a phase change material to enter a liquid state within a graphite matrix of the phase change material configuration.
    Type: Grant
    Filed: August 10, 2013
    Date of Patent: November 22, 2016
    Assignee: Intel Corporation
    Inventors: Daryl Nelson, Kevin Daniel, Daniel Chiang, Mark Gallina, Steven Lofland
  • Publication number: 20160269067
    Abstract: Systems and methods may provide for a device including a housing, one or more electronic components positioned within the housing, and a first cured resin composition positioned within the housing, the first cured resin composition including a thermal energy storage material and a first filler material. The device may also include a second cured resin composition positioned within the housing, the second cured resin composition including the thermal energy storage material and a second filler material. The first filler material and the second filler material may be different, wherein the first cured resin composition and the second cured resin composition may encompass at least one of the one or more electronic components. In other examples, the electronic components include a power supply and the device complies with an ATEX equipment directive for explosive atmospheres. Moreover, component underfill and/or assembly overmold processes may be used to fabricate the device.
    Type: Application
    Filed: December 26, 2013
    Publication date: September 15, 2016
    Inventors: David PIDWERBECKI, Mark GALLINA, Mark HEMMEYER, Steven LOFLAND, Ponniah ILAVARASAN, Michael STEWART, Kevin BYRD
  • Publication number: 20150043161
    Abstract: Mobile platforms and methods may provide for an integrated circuit such as a system on chip (SoC), a first heat spreader thermally coupled to the integrated circuit and a phase change material configuration thermally coupled to the first heat spreader. The integrated circuit may include logic to operate the integrated circuit in a performance burst mode according to a duty cycle, wherein the performance burst mode causes a phase change material to enter a liquid state within a graphite matrix of the phase change material configuration.
    Type: Application
    Filed: August 10, 2013
    Publication date: February 12, 2015
    Inventors: Daryl Nelson, Kevin Daniel, Daniel Chiang, Mark Gallina, Steven Lofland
  • Publication number: 20070188993
    Abstract: In some embodiments, a heatsink includes a thermally conductive core and at least ten thermally conductive fins extending quasi-radially from the thermally conductive core, wherein most of the fins are of uniform length, and wherein at least a portion of the thermally conductive core is shaped such that the fins having uniform length form a substantially rectangular cross sectional form factor. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: February 14, 2006
    Publication date: August 16, 2007
    Inventors: Mark Gallina, Kevin Ceurter
  • Publication number: 20050092614
    Abstract: The force required to seal a surface of an object for electrodeposition may be controlled. For example, the object may rest on a support that carries the majority of the force required for surface sealing. Further, pads mounted on the ends of flexible beams may exert a variable force to establish electrical contact with the object that may be controlled. By controlling the forces exerted on an object damage to the object's surface may be minimized or eliminated.
    Type: Application
    Filed: October 29, 2003
    Publication date: May 5, 2005
    Inventor: Mark Gallina
  • Patent number: D774488
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: December 20, 2016
    Assignee: Intel Corporation
    Inventors: Aleksander Magi, Hosam Haggag, Terry Pilsner, Hong W. Wong, Steven Lofland, Mark Gallina