Abstract: Apparatus and method for generating a divided clock signal. A ring counter is provided with a sequence of output states. During steady-state operation, a different one of the output states is set at a first logical level and each of the remaining output states is set at a second logical level at each successive clock transition in a master clock signal. A gate network uses the respective logical levels of the output states to generate the divided clock signal. An error detection circuit outputs an error detection signal when a number of the output states at the first logical level is other than one, and proceeds to synchronously reset the ring counter when the error condition is detected. A programmable processor further asynchronously resets the ring counter in response to the error detection signal, as desired.

Abstract: Apparatus and method for generating a divided clock signal. A ring counter is provided with a sequence of output states. During steady-state operation, a different one of the output states is set at a first logical level and each of the remaining output states is set at a second logical level at each successive clock transition in a master clock signal. A gate network uses the respective logical levels of the output states to generate the divided clock signal. An error detection circuit outputs an error detection signal when a number of the output states at the first logical level is other than one, and proceeds to synchronously reset the ring counter when the error condition is detected. A programmable processor further asynchronously resets the ring counter in response to the error detection signal, as desired.

Abstract: A memory medium has a plurality of tracks arranged in a plurality of sectors with each track sector having a format which does not include header fields identifying sectors or sector defects or defect management procedures. Track management apparatus identifies the track sector currently confronting a transducer; the track management being based on sector pulses (in the case of a dedicated servo system), or being calculated based on track information, an index pulse and data wedge information from previous wedges (in the case of embedded servo systems), or being derived from a lookup table. To accommodate sector defects, a defect bank contains the identity and type of each defective or spare sector.

Abstract: A memory medium has a plurality of tracks arranged in a plurality of sectors with each track sector having a format which does not include header fields identifying sectors or sector defects or defect management procedures. Track management apparatus identifies the track sector currently confronting a transducer; the track management being based on sector pulses (in the case of a dedicated servo system), or being calculated based on track information, an index pulse and data wedge information from previous wedges (in the case of embedded servo systems), or being derived from a lookup table. To accommodate sector defects, a defect bank contains the identity and type of each defective or spare sector.

Abstract: An apparatus for correcting header information includes a transducer for reading and writing encoded information to a magnetic storage medium. A serial/deserializer provides a deserialized output. Header information from the deserializer is stored in a header storage register. The deserialized header information is also provided to a header error correction circuit. The header error correction circuit provides an output indicating location and value of errors in the header memory. This information is used to correct errors in the header memory. The corrected header information is compared with predetermined header information and used to determine whether subsequent data associated with the header should be written to or read from the magnetic storage medium.