Patents by Inventor Mark H. Sternberg

Mark H. Sternberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7948292
    Abstract: An integrated circuit includes first and second voltage domains. The first voltage domain is associated with a positive voltage supply grid and the second voltage domain is associated with a selectably on voltage supply grid. A switch is used to selectably switch on and off the selectably on voltage supply grid to power the second voltage domain. A buffer cell cluster of at least on initial buffer cell and a pair of insulator cells is coupled to the positive voltage supply grid electrically independent of the nodes of a switch and is capable of buffering a feed-through signal having a logic one voltage level defined substantially at the voltage level of the positive voltage supply grid. The buffer cell cluster has two distal ends. buffer cell cluster, at one distal end, is coupled to a first insulator cell of the pair of cells while, at the other distal end, the buffer cell cluster is coupled to a second insulator cell of the pair of the cells.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: May 24, 2011
    Assignee: ATI Technologies ULC
    Inventors: Robert Chiu, Denitza Tchoevska, Parissa Najdesamii, Mark H. Sternberg
  • Patent number: 6919908
    Abstract: The present invention includes a method and apparatus for graphics processing in a handheld device including a transform engine capable of receiving vertex information. The transform engine generates a plurality of vertices from the vertex information, wherein each of the vertices includes a corresponding bin identifier. The method and apparatus further includes view frame factors defining a clipping region such that when any of the plurality of vertices is within the clipping region, a clip identifier is generated for that vertex using the corresponding bin identifier. A vertex shader coupled to a clipping module, wherein the clipping module generates supplemental vertices and the vertex shader receives the supplemental vertices therefrom. The vertex shader combines the supplemental vertices with the bin identifiers and are provided to a vertex buffer.
    Type: Grant
    Filed: August 6, 2003
    Date of Patent: July 19, 2005
    Assignee: ATI Technologies, Inc.
    Inventors: Aaftab A. Munshi, Mark H. Sternberg