Abstract: There is disclosed a power control circuit for controlling the combined effective DC bias current of a bank of parallel RF power amplifiers disposed in the transmit path of an RF transmitter. The power control circuit comprises: 1) a first signal monitor for monitoring the level of a modulated RF output signal; and 2) an amplifier bias current controller for comparing the modulated RF output signal level and a known maximum output power parameter of the active RF power amplifiers to determine if the active RF power amplifiers are operating in the linear region. If the active RF power amplifiers are operating in or near the nonlinear region, the power control circuit enables one or more inactive RF power amplifiers to increase the effective combined DC bias current and linearity of the active RF power amplifiers.

Abstract: There is disclosed, for use in a wireless communication system comprising at least one base station operable to communicate with a plurality of mobile units, a power controller for controlling a power consumption of a linear power amplifier in the base station. The power controller comprises: 1) a first power monitor for determining an RF output power level of the linear power amplifier; 2) a second power monitor for determining a primary power level consumed by the linear power amplifier; and 3) a processing circuit operable to determine an actual power ratio of the primary power level and the RF output power level and to adjust the primary power level to maintain the actual power ratio at approximately a selected target power ratio.

Abstract: There is disclosed, for use in an RF amplifier, a biasing circuit for maintaining the quiescent current of an output power transistor at a selected bias level. The biasing circuit comprises a temperature sensor circuit for generating a temperature-sensitive control voltage that varies according to changes in temperature of the output power transistor and a bias voltage generating circuit capable of detecting a variation in the temperature-sensitive control voltage. In response to a detected change in the temperature-sensitive control voltage, the bias circuit adjusts a bias voltage applied to the output power transistor by an amount suitable to offset a change in the selected bias current level caused by a temperature change related to the variation in the temperature-sensitive voltage.