Abstract: An integrated circuit device having at least one fuse capable of being blown in order to provide measurements of fuse current-voltage characteristics is provided. The integrated circuit device also provides at least one pulse generation circuit associated with the fuse and capable of generating a pulse to blow the fuse through one or more DC input signals.

Abstract: An integrated circuit device having at least one fuse capable of being blown in order to provide measurements of fuse current-voltage characteristics is provided. The integrated circuit device also provides at least one pulse generation circuit associated with the fuse and capable of generating a pulse to blow the fuse through one or more DC input signals.

Abstract: A method for inline characterization of at least one high speed operating margin of a storage element is provided. An output of at least one latch of the integrated circuit device is transitioned from a first output logic state to a second output logic state. The storage element is accessed at least once in response to the transition of the output of the at least one latch to perform at least one of a write operation and a read operation. A state of at least one output latch is observed corresponding to a state of the storage element. The transitioning, accessing and observing steps are repeated for one or more adjustable parameters to determine at least one high speed operating margin of the storage element.

Abstract: A method of measuring variability of integrated circuit components is provided. A specified parameter of at least one first array configuration comprising a plurality of the integrated circuit components without specified internal connections between the integrated circuit components is measured. The specified parameter of at least one second array configuration comprising a plurality of the integrated circuit components nominally identical to those of the first array configuration with specified internal connections between the integrated circuit components is also measured. A variation coefficient is determined for the integrated circuit components based on the measured specified parameter of the at least one first array configuration and the at least one second array configuration.

Abstract: An integrated circuit device is provided having a reference ring oscillator circuit having a plurality of stages. Each stage has a logic gate and electrically connecting to a first independent voltage source. The integrated circuit device also has at least one additional ring oscillator circuit having a plurality of stages. Each stage has a logic gate substantially identical to the logic gates of the reference ring oscillator circuit and electrically connecting to a respective at least one second independent voltage source. Each stage also has a FET load driven by the logic gate and electrically connecting to a third independent voltage source. A measured difference in capacitance between the reference ring oscillator circuit per stage and the at least one additional ring oscillator circuit per stage comprises a gate capacitance of a FET load.

Abstract: An integrated circuit device is provided having one or more pairs of ring oscillator circuits. Each ring oscillator circuit of the one or more pairs of ring oscillator circuits is configured to connect to at least one voltage source capable of applying a stress to a ring oscillator circuit. One or more frequency measurement circuits are each electrically connected to a respective pair of the one or more pairs of ring oscillator circuits.

Abstract: A method and apparatus is provided for measuring alternating current (AC) and direct current (DC) characteristics of a plurality of semiconductor devices. A ring oscillator generates pulses to drive the plurality of semiconductor devices under test. Current/Voltage (IV) and transfer characteristics of the plurality of semiconductor devices are measured using only DC input/output.

Abstract: An integrated circuit device having at least one fuse capable of being blown in order to provide measurements of fuse current-voltage characteristics is provided. The integrated circuit device also provides at least one pulse generation circuit associated with the fuse and capable of generating a pulse to blow the fuse through one or more DC input signals.

Abstract: A method and apparatus for monitoring a plurality of semiconductor devices is disclosed. At least one array of 2n semiconductor circuits is provided. A clock ring oscillator provides a clock signal. The clock signal drives a frequency divider followed by an n-stage binary counter. The outputs from the counter's stages drive an n-input decoder which sequentially addresses each semiconductor circuit. An output signal from each semiconductor circuit is measured and read out over a common bus, where a distribution of the output signals is a measure of a distribution of a parameter of interest.

Abstract: A method and apparatus for measuring alternating current (AC) and direct current (DC) characteristics of a plurality of semiconductor devices. A ring oscillator generates pulses to drive the plurality of semiconductor devices under test. Current/Voltage (IV) and transfer characteristics of the plurality of semiconductor devices are measured using only DC input/output.

Abstract: A set of ring oscillators is formed within a predetermined distance of each other. Each ring oscillator includes a number of coupled stages. The stages for a first given ring oscillator include an inverter having one or more first MOS devices having a first gate length. The stages for a second given ring oscillator include an inverter substantially identical to the inverters in the coupled stages of the first given ring oscillator and one or more second MOS devices having a second designed gate length. The stages for a third given ring oscillator comprise an inverter substantially identical to the inverters in the coupled stages of the first given ring oscillator and one or more third MOS devices having a third designed gate length. The second and third designed gate lengths are different and one of the second and third designed gate lengths is approximately equal to the first designed gate length. Performance is measured by using one of more of the given ring oscillators.