Patents by Inventor Mark Landers

Mark Landers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190266092
    Abstract: A coherency manager for receiving snoop requests addressed in a physical address space, the snoop requests relating to a cache memory addressable using a virtual address space, the cache memory having a plurality of coherent cachelines, the coherency manager comprising: a reverse translation module configured to maintain a mapping from physical addresses to virtual addresses for each coherent cacheline held in the cache memory; and a snoop processor configured to: receive a snoop request relating to a physical address; in response to the received snoop request, determine whether the physical address is mapped to a virtual address in the reverse translation module; and process the snoop request in dependence on that determination.
    Type: Application
    Filed: March 15, 2018
    Publication date: August 29, 2019
    Inventors: Martin John Robinson, Mark Landers
  • Publication number: 20190266091
    Abstract: A memory interface for interfacing between a memory bus and a cache memory, comprising: a plurality of bus interfaces configured to transfer data between the memory bus and the cache memory; and a plurality of snoop processors configured to receive snoop requests from the memory bus; wherein each snoop processor is associated with a respective bus interface and each snoop processor is configured, on receiving a snoop request, to determine whether the snoop request relates to the bus interface associated with that snoop processor and to process the snoop request in dependence on that determination.
    Type: Application
    Filed: March 15, 2018
    Publication date: August 29, 2019
    Inventors: Martin John Robinson, Mark Landers
  • Publication number: 20190155640
    Abstract: A converter module is described which handles memory requests issued by a cache (e.g. an on-chip cache), where these memory requests include memory addresses defined within a virtual memory space. The converter module receives these requests, issues each request with a transaction identifier and uses that identifier to track the status of the memory request. The converter module sends requests for address translation to a memory management unit and where there the translation is not available in the memory management unit receives further memory requests from the memory management unit. The memory requests are issued to a memory via a bus and the transaction identifier for a request is freed once the response has been received from the memory. When issuing memory requests onto the bus, memory requests received from the memory management unit may be prioritized over those received from the cache.
    Type: Application
    Filed: January 18, 2019
    Publication date: May 23, 2019
    Inventors: Mark Landers, Martin John Robinson
  • Patent number: 10278704
    Abstract: Disclosed are devices for pericardial access to the heart, including direct access to the left atrium. In certain embodiments, the device may comprise a device and/or an atrial appendage (AA) portal having a configuration such that the distal end of the device and/or the portal can access an atrial appendage while the proximal end of the device and/or portal can extend to outside of the subject. The devices and methods may also include a pericardial portal for emplacement of the device and/or the AA portal. Also, methods for using such devices and/or AA portals and pericardial portals to perform surgery on the heart, and systems (e.g., kits) comprising these devices and/or portals in combination with other therapeutic devices are disclosed.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: May 7, 2019
    Assignee: ArtiCure, Inc.
    Inventors: Andy Christopher Kiser, Mark Landers
  • Patent number: 10198286
    Abstract: A converter module is described which handles memory requests issued by a cache (e.g. an on-chip cache), where these memory requests include memory addresses defined within a virtual memory space. The converter module receives these requests, issues each request with a transaction identifier and uses that identifier to track the status of the memory request. The converter module sends requests for address translation to a memory management unit and where there the translation is not available in the memory management unit receives further memory requests from the memory management unit. The memory requests are issued to a memory via a bus and the transaction identifier for a request is freed once the response has been received from the memory. When issuing memory requests onto the bus, memory requests received from the memory management unit may be prioritized over those received from the cache.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: February 5, 2019
    Assignee: Imagination Technologies Limited
    Inventors: Mark Landers, Martin John Robinson
  • Publication number: 20180155794
    Abstract: The disclosure provides methods correlating intra-patient genomic heterogeneity of single CTCs with phenotypic heterogeneity in each of a population of prostate cancer (PCa) patients.
    Type: Application
    Filed: May 27, 2016
    Publication date: June 7, 2018
    Inventors: Ryan Dittamore, Mark Landers
  • Publication number: 20170357512
    Abstract: An on-chip cache is described which receives memory requests and in the event of a cache miss, the cache generates memory requests to a lower level in the memory hierarchy (e.g. to a lower level cache or an external memory). Data returned to the on-chip cache in response to the generated memory requests may be received out-of-order. An instruction scheduler in the on-chip cache stores pending received memory requests and effects the re-ordering by selecting a sequence of pending memory requests for execution such that pending requests relating to an identical cache line are executed in age order and pending requests relating to different cache lines are executed in an order dependent upon when data relating to the different cache lines is returned. The memory requests which are received may be received from another, lower level on-chip cache or from registers.
    Type: Application
    Filed: June 13, 2017
    Publication date: December 14, 2017
    Inventors: Mark Landers, Martin John Robinson
  • Publication number: 20170286151
    Abstract: A converter module is described which handles memory requests issued by a cache (e.g. an on-chip cache), where these memory requests include memory addresses defined within a virtual memory space. The converter module receives these requests, issues each request with a transaction identifier and uses that identifier to track the status of the memory request. The converter module sends requests for address translation to a memory management unit and where there the translation is not available in the memory management unit receives further memory requests from the memory management unit. The memory requests are issued to a memory via a bus and the transaction identifier for a request is freed once the response has been received from the memory. When issuing memory requests onto the bus, memory requests received from the memory management unit may be prioritized over those received from the cache.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 5, 2017
    Inventors: Mark Landers, Martin John Robinson
  • Publication number: 20170245866
    Abstract: Disclosed are devices for pericardial access to the heart, including direct access to the left atrium. In certain embodiments, the device may comprise a device and/or an atrial appendage (AA) portal having a configuration such that the distal end of the device and/or the portal can access an atrial appendage while the proximal end of the device and/or portal can extend to outside of the subject. The devices and methods may also include a pericardial portal for emplacement of the device and/or the AA portal. Also, methods for using such devices and/or AA portals and pericardial portals to perform surgery on the heart, and systems (e.g., kits) comprising these devices and/or portals in combination with other therapeutic devices are disclosed.
    Type: Application
    Filed: October 10, 2016
    Publication date: August 31, 2017
    Inventors: Andy Christopher Kiser, Mark Landers
  • Publication number: 20020176796
    Abstract: The present invention relates to methods and treatment systems for inactivation of microbes and/or nucleic acids in biological fluids, especially platelet compositions without completely damaging antigens, enzymes and membrane functions. In accordance with the method of the invention, a biological fluid is illuminated with a light source having at least one wavelength within a range of 170 to 2600 nm to inactivate microbes in the composition and inactivate nucleic acids inside cells without destroying proteins (enzymes) and membrane functions.
    Type: Application
    Filed: February 4, 2002
    Publication date: November 28, 2002
    Applicant: PurePulse Technologies, Inc.
    Inventors: Jeffrey Morse Holloway, Kenton Salisbury, William H. Cover, Mark Landers
  • Patent number: 6233332
    Abstract: The present media independent communications processing system functions to provide business useful services to customers with the anymedia resources that are required to satisfy the customer's request. In particular, the system carries call information across the entirety of a transaction with the call being managed as an anymedia multi-transactional event. The model used for the present media independent communications processing system, as embodied in a call center, comprises a hallways and rooms paradigm that enables the customer to dynamically navigate their anymedia communications connection to a desired information providing source. As the customer's call is routed during the duration of the communication session, the call context information is stored and used by the rules-based call routing process to identify a source of information/services that is best adapted to serve the needs of this customer.
    Type: Grant
    Filed: June 3, 1998
    Date of Patent: May 15, 2001
    Assignee: Avaya Technology Corp.
    Inventors: Gregory Lane Anderson, Lucinda M. Sanders, Robert W. Donnelly, Eugene Mathews, Mark Landers