Abstract: Systems and methods for effectuating verification and certification of verifiable devices. Preferably, but not necessarily, such certification occurs or is communicated remotely. A verifiable device may be directly or indirectly connected to an appropriate regulatory agency through a communication mechanism. One or more tests may be performed on the verifiable device to verify that the device is functioning properly. The test results are directly or indirectly transmitted to the regulatory agency. If the tests were passed then the verifiable device may be approved for use. When self-certification or remote certification is provided for, the need for in-person verification and certification procedures by agency personnel may be eliminated.

Abstract: Systems and methods for effectuating verification and certification of verifiable devices. Preferably, but not necessarily, such certification occurs or is communicated remotely. A verifiable device may be directly or indirectly connected to an appropriate regulatory agency through a communication mechanism. One or more tests may be performed on the verifiable device to verify that the device is functioning properly. The test results are directly or indirectly transmitted to the regulatory agency. If the tests were passed then the verifiable device may be approved for use. When self-certification or remote certification is provided for, the need for in-person verification and certification procedures by agency personnel may be eliminated.

Abstract: A power semiconductor assembly, particularly a semiconductor switch assembly which has a number of discrete emitter connection pads, comprised of a metal matrix composite housing and a copper or aluminum post with a cross-sectional area sufficiently large to carry the rated current providing a single-point, external connection to all emitter pads. The post passes through and is supported by an insulating ceramic insert such as aluminum oxide in the wall of the metal matrix composite housing. The post is hollowed out in the region where it passes through the ceramic insert in order to reduce the mechanical stress between the post and the insulating insert as a result of the mismatch in their thermal expansion coefficients. Buses on either side of the semiconductor die provide surfaces for connection from the post to the discrete emitter connection pads on the die.