Patents by Inventor Mark Shlick
Mark Shlick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9484114Abstract: A data storage device includes a memory including a plurality of storage elements configured to store data. The plurality of storage elements includes a first group of storage elements and a second group of storage elements. The data storage device further includes a selection module configured to retrieve first bit line defect information affecting the first group of storage elements and to retrieve second bit line defect information affecting the second group of storage elements.Type: GrantFiled: July 29, 2015Date of Patent: November 1, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Refael Ben-Rubi, Mark Shlick, Moshe Cohen
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Patent number: 9400747Abstract: A data storage device includes a non-volatile memory and a controller. A method includes sending a memory command from the controller to the non-volatile memory. The memory command indicates multiple sense operations to be performed at a single plane of the non-volatile memory.Type: GrantFiled: April 29, 2014Date of Patent: July 26, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Daniel Edward Tuers, Abhijeet Manohar, Mark Murin, Mark Shlick, Menahem Lasser
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Publication number: 20160125960Abstract: Systems, apparatuses, and methods are provided for write abort detection. A memory system may write data to one or more cells in a memory. An abrupt shutdown may interrupt the write, resulting in an uncertainty as to the state of the memory cells. In order to determine the state of the memory cells, after power-up, a first section of memory that includes the memory cells is analyzed, such as counting values of logic “0”s stored in the memory cells of the first section of memory. However, the values in the first section of memory may be subject to error, hindering the accuracy of write abort detection. In order to reduce or cancel the effect of the errors, a second section of memory (which may suffer from similar errors as the first section) is analyzed, such as by counting values of logic “0”s stored in the memory cells of the second section of memory.Type: ApplicationFiled: August 6, 2015Publication date: May 5, 2016Applicant: SanDisk Technologies Inc.Inventors: Karin Inbar, Irit Maor, Mark Shlick, Oded Nitzan
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Patent number: 9218851Abstract: A data storage device includes a non-volatile memory. A method includes programming a first page at a word line of the non-volatile memory. While programming a second page at the word line, first storage elements of the word line are selectively programmed in response to a power drop at the data storage device to increase a state separation that separates data values of the first page.Type: GrantFiled: October 24, 2013Date of Patent: December 22, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Mark Shlick, Mark Murin, Menahem Lasser
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Publication number: 20150154112Abstract: A data storage device includes a non-volatile memory and a controller. A method includes sending a memory command from the controller to the non-volatile memory. The memory command indicates multiple sense operations to be performed at a single plane of the non-volatile memory.Type: ApplicationFiled: April 29, 2014Publication date: June 4, 2015Applicant: SANDISK TECHNOLOGIES INC.Inventors: DANIEL EDWARD TUERS, ABHIJEET MANOHAR, MARK MURIN, MARK SHLICK, MENAHEM LASSER
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Publication number: 20150117098Abstract: A data storage device includes a non-volatile memory. A method includes programming a first page at a word line of the non-volatile memory. While programming a second page at the word line, first storage elements of the word line are selectively programmed in response to a power drop at the data storage device to increase a state separation that separates data values of the first page.Type: ApplicationFiled: October 24, 2013Publication date: April 30, 2015Applicant: SANDISK TECHNOLOGIES INC.Inventors: MARK SHLICK, MARK MURIN, MENAHEM LASSER
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Patent number: 8891301Abstract: A data storage device includes a non-volatile memory that includes a three-dimensional (3D) memory and circuitry associated with operation of memory cells of the 3D memory. A method includes programming a first page at a word line of the non-volatile memory. While programming a second page at the word line, first storage elements of the word line are selectively programmed in response to a power drop at the data storage device to increase a state separation that separates data values of the first page.Type: GrantFiled: May 22, 2014Date of Patent: November 18, 2014Assignee: Sandisk Technologies Inc.Inventors: Mark Shlick, Mark Murin, Menahem Lasser
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Patent number: 8443260Abstract: A method of storage and retrieval of data in a flash memory system, the flash memory system comprising a cache storage area of relatively high reliability, and a main storage area of relatively low reliability, the method comprising adding to data a level of error correction redundancy higher by a predetermined margin than that required for the cache storage area, writing the data to the cache storage area, and from the cache storage area copying the data directly to the main storage area, the predetermined margin being such as to allow subsequent error correction to compensate for errors accumulated from the cache storage area and the main storage area. In this way the memory die copy back operation can be used for copying the data from the cache to the main memory and two out of four transfers over the data bus to the flash controller are avoided.Type: GrantFiled: December 27, 2007Date of Patent: May 14, 2013Assignee: Sandisk IL Ltd.Inventors: Mark Shlick, Mark Murin, Menahem Lasser
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Patent number: 8125833Abstract: A data storage device includes a controller and storage elements. The controller is configured to read a threshold voltage of each of a plurality of the storage elements to generate read threshold data and to assign reference voltages defining each of a plurality of voltage threshold states based on the read threshold data.Type: GrantFiled: December 9, 2010Date of Patent: February 28, 2012Assignee: Sandisk IL Ltd.Inventors: Eran Sharon, Idan Alrod, Mark Shlick
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Patent number: 8112682Abstract: Apparatus and methods for effecting bad-block testing operations are disclosed herein. In some embodiments, instead of effecting bad-block testing for the majority of the flash memory blocks of a flash memory device during manufacture, most or all bad-block testing is postponed until the end user is in possession of the flash memory device. In some embodiments, after user data is received by the flash memory device from a host device, one or more blocks of the flash memory device are subjected to bad-block testing.Type: GrantFiled: April 23, 2009Date of Patent: February 7, 2012Assignee: SanDisk IL LtdInventors: Menahem Lasser, Mark Shlick
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Patent number: 8073648Abstract: A threshold voltage distribution of a set of storage elements in a memory device is measured by sweeping a control gate voltage while measuring a characteristic of the set of storage elements as a whole. The characteristic indicates how many of the storage elements meet a given condition, such as being in a conductive state. For example, the characteristic may be a combined current, voltage or capacitance of the set which is measured at a common source of the set. The control gate voltage can be generated internally within a memory die. Similarly, the threshold voltage distribution can be determined internally within the memory die. Optionally, storage elements which become conductive can be locked out, such as by changing a bit line voltage, so they no longer contribute to the characteristic. New read reference voltages are determined based on the threshold voltage distribution to reduce errors in future read operations.Type: GrantFiled: November 26, 2007Date of Patent: December 6, 2011Assignee: SanDisk IL Ltd.Inventors: Mark Shlick, Menahem Lasser
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Patent number: 8059463Abstract: Information stored as physical states of cells of a memory is read first by setting each of one or more references to a respective member of a first set of values and reading the physical states of the cells relative to the values of the first set. Subsequently, the references are set to respective members of a second set of values, and the physical states of the cells are read again relative to the values of the second set. The second set is different from the first set, so that the two readings together read the physical states of the cells with higher resolution than the first reading alone.Type: GrantFiled: March 9, 2009Date of Patent: November 15, 2011Assignee: Sandisk IL LtdInventors: Mark Murin, Mark Shlick
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Patent number: 8059456Abstract: When a memory device receives two or more pluralities of bits from a host to store in a nonvolatile memory, the device first stores the bits in a volatile memory. Then, in storing the bits in the nonvolatile memory, the device raises the threshold voltages of some cells of the volatile memory to values above a verify voltage. While those threshold voltages remain substantially at those levels, the device raises the threshold voltages of other cells of the volatile memory to values below the verify voltage. In the end, every cell stores one or more bits from each plurality of bits. Preferably, all the cells share a common wordline. A data storage device operates similarly with respect to storing pluralities of bits generated by an application running on the system.Type: GrantFiled: May 30, 2007Date of Patent: November 15, 2011Assignee: SanDisk IL Ltd.Inventors: Mark Shlick, Mark Murin
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Publication number: 20110134692Abstract: A data storage device includes a controller and storage elements. The controller is configured to read a threshold voltage of each of a plurality of the storage elements to generate read threshold data and to assign reference voltages defining each of a plurality of voltage threshold states based on the read threshold data.Type: ApplicationFiled: December 9, 2010Publication date: June 9, 2011Applicant: SANDISK IL LTD.Inventors: ERAN SHARON, IDAN ALROD, MARK SHLICK
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Patent number: 7952928Abstract: Read throughput is increased in a non-volatile memory device by sensing storage elements which are of interest as soon as a word line voltage has propagated to them, but before the word line voltage has propagated to other storage elements which are not of interest. The delay which would be incurred by waiting for the voltage to propagate along the entire word line is avoided. The sensing can occur during programming, as a verify operation, or after programming, as where user data is read. Further, the storage elements may be sensed concurrently, e.g., via sense amplifiers. Data from the storage elements of interest is processed and data from the other storage elements is discarded. A time for sensing the storage elements of interest can be set by identifying which storage elements are being verified or include data which is requested by a read command.Type: GrantFiled: May 27, 2008Date of Patent: May 31, 2011Assignee: SanDisk IL Ltd.Inventors: Mark Murin, Mark Shlick
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Patent number: 7876621Abstract: Each of a plurality of flash memory cells is programmed to a respective one of L?2 threshold voltage states within a threshold voltage window. A histogram is constructed by determining how many of some or all of the cells have threshold voltages in each of two or more of m?2 threshold voltage intervals within the threshold voltage window. Reference voltages for reading the cells are selected based on estimated values of shape parameters of the histogram. Alternatively, the cells are read relative to reference voltages that define m?2 threshold voltage intervals that span the threshold voltage window, to determine numbers of at least a portion of the cells whose threshold voltages are in each of two or more of the threshold voltage intervals. Respective threshold voltage states are assigned to the cells based on the numbers without re-reading the cells.Type: GrantFiled: November 18, 2007Date of Patent: January 25, 2011Assignee: SanDisk IL Ltd.Inventors: Eran Sharon, Idan Alrod, Mark Shlick
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Patent number: 7865658Abstract: A method and system for balancing host write operations and cache flushing is disclosed. The method may include steps of determining an available capacity in a cache storage portion of a self-caching storage device, determining a ratio of cache flushing steps to host write commands if the available capacity is below a desired threshold and interleaving cache flushing steps with host write commands to achieve the ratio. The cache flushing steps may be executed by maintaining a storage device busy status after executing a host write command and utilizing this additional time to copy a portion of the data from the cache storage into the main storage. The system may include a cache storage, a main storage and a controller configured to determine and execute a ratio of cache flushing steps to host write commands by executing cache flushing steps while maintaining a busy status after a host write command.Type: GrantFiled: December 31, 2007Date of Patent: January 4, 2011Assignee: SanDisk IL Ltd.Inventors: Menahem Lasser, Itshak Afriat, Opher Lieber, Mark Shlick
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Publication number: 20100275073Abstract: Apparatus and methods for effecting bad-block testing operations are disclosed herein. In some embodiments, instead of effecting bad-block testing for the majority of the flash memory blocks of a flash memory device during manufacture, most or all bad-block testing is postponed until the end user is in possession of the flash memory device. In some embodiments, after user data is received by the flash memory device from a host device, one or more blocks of the flash memory device are subjected to bad-block testing.Type: ApplicationFiled: April 23, 2009Publication date: October 28, 2010Applicant: SanDisk Il Ltd.Inventors: Menahem LASSER, Mark Shlick
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Patent number: 7657699Abstract: A flash memory device includes an array of memory cells for storing data pages, at least one buffer (e.g. a memory buffer and a cache buffer) for transferring the data pages to and from the array of memory cells and a host, and an output pin. A logic mechanism is operative to select, from among a plurality of conditions related to an operation on the array of memory cells, a condition that drives a signal being output on the output pin. A data page transfer by the host is contingent on the signal being output on the output pin.Type: GrantFiled: April 7, 2006Date of Patent: February 2, 2010Assignee: Sandisk IL Ltd.Inventors: Mark Murin, Mark Shlick
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Publication number: 20090296487Abstract: Read throughput is increased in a non-volatile memory device by sensing storage elements which are of interest as soon as a word line voltage has propagated to them, but before the word line voltage has propagated to other storage elements which are not of interest. The delay which would be incurred by waiting for the voltage to propagate along the entire word line is avoided. The sensing can occur during programming, as a verify operation, or after programming, as where user data is read. Further, the storage elements may be sensed concurrently, e.g., via sense amplifiers. Data from the storage elements of interest is processed and data from the other storage elements is discarded. A time for sensing the storage elements of interest can be set by identifying which storage elements are being verified or include data which is requested by a read command.Type: ApplicationFiled: May 27, 2008Publication date: December 3, 2009Inventors: MARK MURIN, MARK SHLICK