Patents by Inventor Marko KOSKI

Marko KOSKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230251678
    Abstract: A method and apparatuses for power regulation using an extended current limit are disclosed. The power regulator detects an occurrence of an output current of the regulator exceeding a first current limit, triggers an extended current limit timer based on the detected occurrence, regulates the output current according to a second current limit higher than the first current limit based on a duration of the extended current limit timer, and regulates the output current according to the first current limit based on an expiration of the duration of the extended current limit timer.
    Type: Application
    Filed: April 18, 2023
    Publication date: August 10, 2023
    Inventors: Marko KOSKI, Edgar MARTI-ARBONA, Gordon LEE, Anish MUTTREJA, Ravi JENKAL
  • Patent number: 11711007
    Abstract: An apparatus is disclosed for harvesting ringing energy. In an example aspect, the apparatus includes a bootstrap circuit. The bootstrap circuit includes a bootstrap capacitor and a bootstrap switch. The bootstrap switch includes a first terminal configured to accept an input voltage. The bootstrap switch also includes a second terminal coupled to the bootstrap capacitor. The bootstrap switch additionally includes a body diode comprising an anode coupled to the first terminal and a cathode coupled to the second terminal. The bootstrap switch is configured to be in an open state to charge the bootstrap capacitor via the body diode. The bootstrap switch is also configured to provide a voltage at the second terminal of the bootstrap switch. The voltage is greater than an average of the input voltage.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: July 25, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Troy Lynn Stockstad, Yi-Cheng Wan, Marko Koski, Ajay Kumar Kosaraju
  • Patent number: 11662757
    Abstract: A method and apparatuses for power regulation using an extended current limit are disclosed. The power regulator detects an occurrence of an output current of the regulator exceeding a first current limit, triggers an extended current limit timer based on the detected occurrence, regulates the output current according to a second current limit higher than the first current limit based on a duration of the extended current limit timer, and regulates the output current according to the first current limit based on an expiration of the duration of the extended current limit timer.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: May 30, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Marko Koski, Edgar Marti-Arbona, Gordon Lee, Anish Muttreja, Ravi Jenkal
  • Publication number: 20220360159
    Abstract: An apparatus is disclosed for harvesting ringing energy. In an example aspect, the apparatus includes a bootstrap circuit. The bootstrap circuit includes a bootstrap capacitor and a bootstrap switch. The bootstrap switch includes a first terminal configured to accept an input voltage. The bootstrap switch also includes a second terminal coupled to the bootstrap capacitor. The bootstrap switch additionally includes a body diode comprising an anode coupled to the first terminal and a cathode coupled to the second terminal. The bootstrap switch is configured to be in an open state to charge the bootstrap capacitor via the body diode. The bootstrap switch is also configured to provide a voltage at the second terminal of the bootstrap switch. The voltage is greater than an average of the input voltage.
    Type: Application
    Filed: May 10, 2021
    Publication date: November 10, 2022
    Inventors: Troy Lynn Stockstad, Yi-Cheng Wan, Marko Koski, Ajay Kumar Kosaraju
  • Publication number: 20210408906
    Abstract: A voltage regulator circuit using predictively precharged voltage rails is generally disclosed. For example, the voltage regulator circuit may include a main switching regulator configured to provide a target voltage, the main switching regulator having a first voltage node, a precharge switching regulator configured to provide a precharge voltage, the precharge switching regulator having a second voltage node, the precharge voltage based on a difference between the target voltage and a next target voltage to be provided by the main switching regulator, and a precharge switch circuit configured to selectively couple the second voltage node to an output voltage node based upon a transition from the target voltage to the next target voltage.
    Type: Application
    Filed: July 8, 2021
    Publication date: December 30, 2021
    Inventors: Chris ROSOLOWSKI, Todd SUTTON, Orlando SANTIAGO, Joseph DUNCAN, Rashed HOQUE, Marko KOSKI, Zdravko LUKIC
  • Patent number: 11159009
    Abstract: Exemplary embodiments are related to a buck regulator. A buck regulator may include an inductor selectively coupled to an output and a power supply. The regulator may also include a controller configured to detect an over-current event if an amount of current flowing from the power supply to the inductor is equal to or greater than a current threshold and detect a low-voltage event if a voltage at the output is less than or equal to a reference voltage. Further, in response to the over-current event and the low-voltage event, the controller may be configured to prevent current from flowing from the power supply to the inductor until substantially all energy stored by the inductor has been dissipated.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: October 26, 2021
    Assignee: QUALCOMM INCORPORATED
    Inventor: Marko Koski
  • Publication number: 20210294369
    Abstract: A method and apparatuses for power regulation using an extended current limit are disclosed. The power regulator detects an occurrence of an output current of the regulator exceeding a first current limit, triggers an extended current limit timer based on the detected occurrence, regulates the output current according to a second current limit higher than the first current limit based on a duration of the extended current limit timer, and regulates the output current according to the first current limit based on an expiration of the duration of the extended current limit timer.
    Type: Application
    Filed: March 19, 2021
    Publication date: September 23, 2021
    Inventors: Marko KOSKI, Edgar Marti-Arbona, Gordon Lee, Anish Muttreja, Ravi Jenkal
  • Patent number: 11063514
    Abstract: A voltage regulator circuit using predictively precharged voltage rails is generally disclosed. For example, the voltage regulator circuit may include a main switching regulator configured to provide a target voltage, the main switching regulator having a first voltage node, a precharge switching regulator configured to provide a precharge voltage, the precharge switching regulator having a second voltage node, the precharge voltage based on a difference between the target voltage and a next target voltage to be provided by the main switching regulator, and a precharge switch circuit configured to selectively couple the second voltage node to an output voltage node based upon a transition from the target voltage to the next target voltage.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: July 13, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Chris Rosolowski, Todd Sutton, Orlando Santiago, Joseph Duncan, Rashed Hoque, Marko Koski, Zdravko Lukic
  • Patent number: 10715122
    Abstract: An apparatus is disclosed that includes a voltage-controlled delay generator. In an example aspect, the apparatus includes voltage-controlled timing circuitry, duty cycle detection circuitry, and output circuitry. The voltage-controlled timing circuitry is configured to receive a control voltage. The voltage-controlled timing circuitry includes a current source, a control transistor, and a capacitor that are configured to produce a voltage indicator based on the control voltage. The duty cycle detection circuitry is coupled to the voltage-controlled timing circuitry. The duty cycle detection circuitry is configured to detect the voltage indicator and provide a duty cycle indicator based on the voltage indicator. The output circuitry is coupled to the duty cycle detection circuitry and is configured to generate a duty signal based on the duty cycle indicator.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: July 14, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Guolei Yu, Ajay Kumar Kosaraju, Marko Koski
  • Patent number: 10707753
    Abstract: The present disclosure describes aspects of power regulation with charge pumps. In some aspects, an integrated circuit (IC) includes multiple processor cores and a power input connected to an internal power rail of the IC. The IC may also comprise embedded charge pumps coupled between the internal power rail of the IC and respective input power rails of the multiple processor cores. Capacitors of the embedded charge pumps may be implemented with on-die capacitors suitable for integration with a die of the circuit to facilitate the embedding of the charge pumps. Alternately or additionally, separate input power rails of the processor cores and the embedded charge pumps may enable more-efficient power regulation or power management on a per-processor core basis, such as when a processor core is throttled or idled to reduce power consumption.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: July 7, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Marko Koski, Charles Tuten
  • Publication number: 20190386565
    Abstract: A voltage regulator circuit using predictively precharged voltage rails is generally disclosed. For example, the voltage regulator circuit may include a main switching regulator configured to provide a target voltage, the main switching regulator having a first voltage node, a precharge switching regulator configured to provide a precharge voltage, the precharge switching regulator having a second voltage node, the precharge voltage based on a difference between the target voltage and a next target voltage to be provided by the main switching regulator, and a precharge switch circuit configured to selectively couple the second voltage node to an output voltage node based upon a transition from the target voltage to the next target voltage.
    Type: Application
    Filed: August 27, 2019
    Publication date: December 19, 2019
    Inventors: Chris ROSOLOWSKI, Todd SUTTON, Orlando SANTIAGO, Joseph DUNCAN, Rashed Rashedul HOQUE, Marko KOSKI, Zdravko LUKIC
  • Publication number: 20190334512
    Abstract: An apparatus is disclosed that includes a voltage-controlled delay generator. In an example aspect, the apparatus includes voltage-controlled timing circuitry, duty cycle detection circuitry, and output circuitry. The voltage-controlled timing circuitry is configured to receive a control voltage. The voltage-controlled timing circuitry includes a current source, a control transistor, and a capacitor that are configured to produce a voltage indicator based on the control voltage. The duty cycle detection circuitry is coupled to the voltage-controlled timing circuitry. The duty cycle detection circuitry is configured to detect the voltage indicator and provide a duty cycle indicator based on the voltage indicator. The output circuitry is coupled to the duty cycle detection circuitry and is configured to generate a duty signal based on the duty cycle indicator.
    Type: Application
    Filed: April 30, 2018
    Publication date: October 31, 2019
    Inventors: Guolei Yu, Ajay Kumar Kosaraju, Marko Koski
  • Publication number: 20190319610
    Abstract: The present disclosure provides a duty locked loop circuit that includes a switch network including a first electronic switch device controlled by a first control signal that is based on a first input signal and a second electronic switch device controlled by a second control signal that is based on a second input signal. The duty locked loop circuit includes an integrator circuit electrically connected to the switch network. The integrator circuit is configured to generate an output voltage proportional to an integral of a difference between a first duty cycle of the first input signal and a second duty cycle of the second input signal. The duty locked loop circuit includes an output circuit configured to generate an output signal having an output duty cycle that is based on the output voltage.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 17, 2019
    Inventors: Guolei YU, Ajay Kumar KOSARAJU, CHARLES TUTEN, Marko KOSKI, Aniruddha BASHAR
  • Patent number: 10439597
    Abstract: The present disclosure provides a duty locked loop circuit that includes a switch network including a first electronic switch device controlled by a first control signal that is based on a first input signal and a second electronic switch device controlled by a second control signal that is based on a second input signal. The duty locked loop circuit includes an integrator circuit electrically connected to the switch network. The integrator circuit is configured to generate an output voltage proportional to an integral of a difference between a first duty cycle of the first input signal and a second duty cycle of the second input signal. The duty locked loop circuit includes an output circuit configured to generate an output signal having an output duty cycle that is based on the output voltage.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: October 8, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Guolei Yu, Ajay Kumar Kosaraju, Charles Tuten, Marko Koski, Aniruddha Bashar
  • Publication number: 20190089244
    Abstract: The present disclosure describes aspects of power regulation with charge pumps. In some aspects, an integrated circuit (IC) includes multiple processor cores and a power input connected to an internal power rail of the IC. The IC may also comprise embedded charge pumps coupled between the internal power rail of the IC and respective input power rails of the multiple processor cores. Capacitors of the embedded charge pumps may be implemented with on-die capacitors suitable for integration with a die of the circuit to facilitate the embedding of the charge pumps. Alternately or additionally, separate input power rails of the processor cores and the embedded charge pumps may enable more-efficient power regulation or power management on a per-processor core basis, such as when a processor core is throttled or idled to reduce power consumption.
    Type: Application
    Filed: September 19, 2017
    Publication date: March 21, 2019
    Inventors: Marko Koski, Charles Tuten
  • Patent number: 10019021
    Abstract: The present disclosure describes aspects of voltage settling detection for switching regulators. In some aspects, an integrated circuit for controlling a switching regulator includes a modulator having an output coupled to switch drive circuitry of the switching regulator. A digital-to-analog converter (DAC) has a first output coupled to an input of the modulator and a second output configured to indicate when a digital-to-analog conversion is complete. A voltage settling detector is configured to receive, from the second output of DAC, an indication that the digital-to-analog conversion is complete and detect a signal transition at the output of the modulator. Based on the indication and the signal transition, the voltage settling detector can provide a status indication for the switching regulator. By so doing, the voltage settling detector may indicate that an output voltage of the switching regulator is proximate a target output voltage level set by the DAC.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: July 10, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Gordon Lee, Marko Koski, Zdravko Lukic
  • Publication number: 20140292292
    Abstract: Exemplary embodiments are related to a buck regulator. A buck regulator may include an inductor selectively coupled to an output and a power supply. The regulator may also include a controller configured to detect an over-current event if an amount of current flowing from the power supply to the inductor is equal to or greater than a current threshold and detect a low-voltage event if a voltage at the output is less than or equal to a reference voltage. Further, in response to the over-current event and the low-voltage event, the controller may be configured to prevent current from flowing from the power supply to the inductor until substantially all energy stored by the inductor has been dissipated.
    Type: Application
    Filed: January 9, 2014
    Publication date: October 2, 2014
    Applicant: QUALCOMM Incorporated
    Inventor: Marko KOSKI