Patents by Inventor Markus A. Levy

Markus A. Levy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5809558
    Abstract: A memory management method is provided for a nonvolatile memory having a plurality of blocks each of which can be electrically erased and programmed. A data file to be stored in the nonvolatile memory is received. A number of blocks that are available for data storage are located from the plurality of blocks. The data file is stored in a first block of the number of blocks if the size of the data file is smaller than the total storage space of the first block. The data file is stored in the first block and a second block of the number of blocks if the size of the data file is larger than the total storage space of the first block but smaller than the total storage space of the first and second blocks. Unoccupied space of the first or second block by the data file is not used to store other data files such that no file reallocation operation is needed when the first or second block is to be erased.
    Type: Grant
    Filed: March 17, 1997
    Date of Patent: September 15, 1998
    Assignee: Intel Corporation
    Inventors: Walter S. Matthews, Markus A. Levy
  • Patent number: 5754817
    Abstract: A method for managing and addressing an executable-in-place (XIP) program stored in a memory having a plurality of blocks includes the step of virtually storing a first portion of the XIP program in a first page of a paged virtual memory space and a second portion of the XIP program in a second page of the paged virtual memory space. The first portion of the XIP program is physically stored in a first block of the plurality of blocks and the second portion of the XIP program is physically stored in a second block of the plurality of blocks. A memory address mapping window is established with addresses of the first block. A page map for mapping the memory address mapping window to the first page is established. The first block is addressed for the first portion of the XIP program via the page map and the memory address mapping window.
    Type: Grant
    Filed: February 12, 1997
    Date of Patent: May 19, 1998
    Assignee: Intel Corporation
    Inventors: Steven E. Wells, Markus A. Levy
  • Patent number: 5715423
    Abstract: A memory that resides on a single substrate includes (1) a memory array having a first block and a second block and (2) control circuitry coupled to the memory array for performing memory operations with respect to the memory array. A data transfer circuit is provided in the memory that is coupled to the control circuitry and is responsive to a data transfer command received from an external circuit. The data transfer circuit controls the control circuitry to perform a data transfer operation to transfer data from the first block to the second block. The data is first read from the first block of the memory. The data read from the first block of the memory is then stored in a buffer of the memory. The data stored in the buffer is then written into the second block of the memory such that the data is transferred from the first block of the memory device to the second block of the memory device without leaving the memory. A method of transferring data within the memory is also described.
    Type: Grant
    Filed: April 18, 1994
    Date of Patent: February 3, 1998
    Assignee: Intel Corporation
    Inventor: Markus A. Levy
  • Patent number: 5592669
    Abstract: A non-volatile semiconductor memory that is erasable only in blocks is described. Each bit of the non-volatile semiconductor memory cannot be overwritten from a first logical state to a second logical state without a prior erasure. Each bit of the non-volatile semiconductor memory can be overwritten from a second logical state to a first logical state without a prior erasure. The non-volatile semiconductor memory comprises an active block for storing a first file, a reserve block for storing a second file, and a directory block. The second file is a copy of the first file. The copy is made during a clean-up operation prior to erasure of the active block. The directory block comprises a directory entry for identifying the first file.
    Type: Grant
    Filed: December 1, 1995
    Date of Patent: January 7, 1997
    Assignee: Intel Corporation
    Inventors: Kurt B. Robinson, Dale K. Elbert, Markus A. Levy
  • Patent number: 5544356
    Abstract: A non-volatile semiconductor memory that is erasable only in blocks is described. Each bit of the non-volatile semiconductor memory cannot be overwritten from a first logical state to a second logical state without a prior erasure. Each bit of the non-volatile semiconductor memory can be overwritten from a second logical state to a first logical state without a prior erasure. The non-volatile semiconductor memory comprises an active block for storing a first file, a reserve block for storing a second file, and a directory block. The second file is a copy of the first file. The copy is made during a clean-up operation prior to erasure of the active block. The directory block comprises a directory entry for identifying the first file.
    Type: Grant
    Filed: March 3, 1995
    Date of Patent: August 6, 1996
    Assignee: Intel Corporation
    Inventors: Kurt B. Robinson, Dale K. Elbert, Markus A. Levy
  • Patent number: 5438549
    Abstract: A memory device that resides on a single substrate includes a nonvolatile memory array. Control circuitry is coupled to the memory array for controlling memory operations with respect to the memory array. A volatile memory buffer is coupled to the control circuitry for buffering data that is to be written into the memory array. The control circuitry fetches the data from the memory buffer to store in the memory array. A power supply control circuit is provided for detecting loss of a power supply applied to the memory buffer and for coupling a backup power supply to the memory buffer when the power supply is disconnected from the memory buffer such that data integrity of the memory device is maintained.
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: August 1, 1995
    Assignee: Intel Corporation
    Inventor: Markus A. Levy
  • Patent number: 5388248
    Abstract: A flash memory card is described which has a plurality of flash memories, each having a ready/busy output for indicating whether its respective one of the plurality of flash memories is busy or ready. A register circuit is provided for storing a plurality of mask data. A mode circuit is provided for choosing one of a first mode and a second mode, wherein a first mode signal is produced if the first mode is chosen and a second mode signal is produced if the second mode is chosen. A logic circuit is provided for performing logical operations with respect to the ready/busy output for each of the plurality of flash memories and the mask data in accordance with whether the first mode signal or the second mode signal is produced. If the first mode is chosen, the logic circuit produces a ready signal output for the flash memory card only if the ready/busy output of all the plurality of flash memories is ready.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: February 7, 1995
    Assignee: Intel Corporation
    Inventors: Kurt B. Robinson, Russell D. Eslick, Markus A. Levy, David M. Brown, Lily C. Pao, Brian L. Dipert
  • Patent number: 5379401
    Abstract: A flash memory card is described which includes a first flash memory and a second flash memory. The first flash memory includes an unmasked first output that enters a first state if the first flash memory is ready and a second state if the first flash memory is busy. The second flash memory includes an unmasked second output that enters the first state if the second flash memory is ready and the second state if the second flash memory is busy. The flash memory card also includes a circuit for selectively providing one of (1) a masked first output (2) the unmasked first output, (3) a masked second output, and (4) the unmasked second output. A latch provides a first ready output signal for the flash memory card. The first ready output signal indicates a first transition from the second state to the first state by one of the unmasked first output of the first flash memory and the unmasked second output of the second flash memory.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: January 3, 1995
    Assignee: Intel Corporation
    Inventors: Kurt B. Robinson, Russell D. Eslick, Markus A. Levy, David M. Brown, Lily C. Pao, Brian L. Dipert
  • Patent number: 5375222
    Abstract: A flash memory card is described which has a ready/busy mask register. First and second flash memories of the flash memory card have respective first and second outputs indicating ready or busy status for the first and second memories. The ready/busy mask register contains mask data. Logic circuitry performs (1) a first logical operation between a first output and a first mask datum to produce a first masked output, (2) a second logical operation between a second output and a second mask datum to produce a second masked output, and (3) a third logical operation between the first masked output and the second masked output to produce a flash memory card ready/busy output. The flash memory card has circuitry for providing a ready output signal that indicates a first (in time) transition from a busy mode to a ready mode by either the first flash memory or the second flash memory of the flash memory card.
    Type: Grant
    Filed: March 31, 1992
    Date of Patent: December 20, 1994
    Assignee: Intel Corporation
    Inventors: Kurt B. Robinson, Russell D. Eslick, Markus A. Levy, David M. Brown, Lily C. Pao, Brian L. Dipert