Abstract: By using a patterned sacrificial layer for forming highly conductive metal regions, the formation of a reliable conductive barrier layer may be accomplished prior to the actual deposition of a low-k dielectric material. Hence, even highly porous dielectrics may be used in combination with highly conductive metals, substantially without compromising the diffusion characteristics and the electromigration performance. Hence, metallization layers for highly scaled semiconductor devices having critical dimensions of 50 nm and significantly less may be provided.

Abstract: By performing an electroless deposition and an electro deposition process in situ, highly reliable metallizations may be provided, wherein limitations with respect to contaminations and device scaling, encountered by conventional chemical vapor deposition (CVD), atomic layer deposition (ALD) and physical vapor deposition (PVD) techniques for the formation of seed layers may be overcome. In some embodiments, a barrier layer is also deposited on the basis of a wet chemical deposition process.

Abstract: By providing a conductive capping layer for metal-based interconnect lines, an enhanced performance with respect to electromigration may be achieved. Moreover, a corresponding manufacturing technique is provided in which via openings may be reliably etched into the capping layer without exposing the underlying metal, such as copper-based material, thereby also providing enhanced electromigration performance, especially at the transitions between copper lines and vias.

Abstract: According to the present invention, a metal and a barrier material, such as copper and a tantalum-based barrier material, are effectively removed from the wafer edge and especially from the bevel by using an etchant that comprises a diluted mixture of hydrofluoric acid and nitric acid. The method is compatible with currently available etch modules for removing metal from the wafer edge, wherein, depending on the hardware specifics, copper, barrier material and dielectric material may be removed in a single etch step, or a first etch step may be performed substantially without any nitric acid so as to avoid the formation of nitric oxides. In this way, the formation of instable layer stacks may be substantially avoided, thereby reducing the risk of material delamination from the substrate edge.

Abstract: In an enhanced technique for electroless metal deposition, the substrate is heated to or above the operating temperature for the specific plating solution, while the plating solution may be maintained at a non-critical low temperature to substantially prevent spontaneous self-decomposition within the plating tool. Hence, significant advantages with respect to process control and cost of ownership may be achieved.

Abstract: The present invention allows correcting malfunctions occurring in the formation of a cap layer on an electrical element in a semiconductor substrate. It is detected whether a malfunction occurred in the formation of the cap layer. If a malfunction in the formation of the cap layer was detected, a rework procedure is performed. The rework procedure can comprise exposing the substrate to a first acid and a second acid.

Abstract: By using signals from an electric drive assembly of an electroplating tool, the operating position of the substrate surface to be plated may be determined in an automated fashion wherein, based on a reference position, the meniscus of the electrolyte and/or any appropriate operating position may be determined. Consequently, accuracy and throughput may be enhanced compared to conventional manual or semi-automatic adjustment procedures.

Abstract: The present invention is directed to methods and apparatuses for removing bubbles from a process liquid. The process liquid can comprise a plating solution used in a plating tool. The process liquid is supplied to a tank. A plurality of streams of the process liquid are directed towards a surface of the process liquid from below. This can be done by feeding the process liquid to a flow distributor comprising a plurality of openings providing flow communication between an inner volume of the flow distributor and a main volume of the tank. Before leaving the tank through an outlet, the process liquid flows through a flow barrier.

Abstract: A plating tool for a single-use plating process comprises a reclaim system in combination with a support tank to enable collection of non-consumed plating solution drained off from the process chamber, which is then re-circulated to the support tank after an efficient treatment in the reclaim system. Since the non-consumed plating solution is continuously recycled, the electrolyte may be preserved substantially without any time limit while at the same time production costs for a single-use plating process are significantly reduced.

Abstract: In a new method of plating metal onto dielectric layers including small diameter vias and large diameter trenches, a surface roughness is created at least on non-patterned regions of the dielectric layer to enhance the uniformity of material removal in a subsequent chemical mechanical polishing (CMP) process.

Abstract: A metal layer is formed by means of an electroless plating process, wherein a surface region of an underlying material is catalytically activated in that a catalyst is deposited or incorporated by CVD, PVD or ALD during and/or after the deposition of the underlying material. In this way, superior metal seed layers may be formed even in high aspect ratio vias of metallization structures.

Abstract: In a storage tank for a process liquid, such as a plating liquid for a plating reactor, one or more barriers are implemented so as to define an inlet area and an outlet area, wherein a fluid flow path is substantially determined by the barrier to significantly suppress the migration of bubbles from the inlet area to the outlet area. In particular embodiments, the introduction of liquid into the storage tank is achieved by inlet lines terminating closely beneath the liquid surface so as to substantially avoid bubble generation and to remove moderately sized bubbles that are conveyed in the inlet lines.

Abstract: According to the present invention, a metal and a barrier material, such as copper and a tantalum-based barrier material, are effectively removed from the wafer edge and especially from the bevel by using an etchant that comprises a diluted mixture of hydrofluoric acid and nitric acid. The method is compatible with currently available etch modules for removing metal from the wafer edge, wherein, depending on the hardware specifics, copper, barrier material and dielectric material may be removed in a single etch step, or a first etch step may be performed substantially without any nitric acid so as to avoid the formation of nitric oxides. In this way, the formation of instable layer stacks may be substantially avoided, thereby reducing the risk of material delamination from the substrate edge.

Abstract: In a new method of plating metal onto dielectric layers including small diameter vias and large diameter trenches, a surface roughness is created at least on non-patterned regions of the dielectric layer to enhance the uniformity of material removal in a subsequent chemical mechanical polishing (CMP) process.

Abstract: The present invention relates to a method and an apparatus for depositing a metal layer on a semiconductor structure. A semiconductor structure comprising at least one recess and at least one elevation is provided. The semiconductor structure is electroplated for depositing a layer of metal and for filling at least one recess with metal. The semiconductor structure is electropolished for preferentially removing the metal from at least one elevation, and chemical mechanical polishing is performed to remove a surplus of the metal from at least one elevation and for planarizing a surface of the semiconductor structure. The present invention advantageously allows the reduction of the demands on the chemical mechanical polishing process.

Abstract: A metal layer is formed by means of an electroless plating process, wherein a surface region of an underlying material is catalytically activated in that a catalyst is deposited or incorporated by CVD, PVD or ALD during and/or after the deposition of the underlying material. In this way, superior metal seed layers may be formed even in high aspect ratio visa of metallization structures.

Abstract: In a new method of electroplating metal onto a patterned dielectric layer including small diameter vias and large diameter trenches, a pulse reverse electroplating sequence with a two-component chemistry is modified to substantially fill the vias, while in a subsequent DC deposition the bulk material is deposited to completely fill the large diameter trenches. Thus, good control quality compared to conventional three-component chemistry electroplating is obtained while the superior characteristics of a metal layer deposited by a two-component chemistry are preserved. The method is particularly advantageous in electroplating copper.

Abstract: In a method of forming damascene metallization lines on a substrate by electroplating and chemical mechanical polishing, the metal layer thickness profile is shaped in correspondence to the removal rate during the chemical mechanical polishing. Thus, any non-uniformity of the chemical mechanical polishing process may be compensated for by appropriately depositing the metal layer so that erosion and dishing of the finally obtained metal lines are within tightly selected manufacturing tolerances.

Abstract: In a method of forming damascene metallization lines on a substrate by electroplating and chemical mechanical polishing, the metal layer thickness profile is shaped in correspondence to the removal rate during the chemical mechanical polishing. Thus, any non-uniformity of the chemical mechanical polishing process may be compensated for by appropriately depositing the metal layer so that erosion and dishing of the finally obtained metal lines are within tightly selected manufacturing tolerances.