Abstract: An image processing system creates a 2-dimensional output image with enhanced depth sensation by operating on a 2-dimensional input image. The system processes the input image non-uniformly by selecting an area in the input image according to a predetermined criterion, and changing a property, e.g., its brightness, of the area relative to a corresponding property of a complement of the area in the input image.

Abstract: An image sensor device of the frame transfer type comprises a substrate having a first region (10) of a first n type, a second region (12) of the opposite p-type and charge transfer channels (15) as well as an arrangement of electrodes (1A . . . 1D) of charge transfer.A photosensitive layer (50) is arranged on the surface (19) of the substrate and has window regions (100, 200) in electrical contact with the channels (15) through windows (40) provided in the arrangement of electrodes, for example through electrodes (1B, 1D). Insulating strips (24) and conductive strips (30) serve to prevent the drift from one window region to the other of charges to be transferred and to evacuate the charges of a sign opposite to that of the charges to be transferred.

Abstract: In a CCD image sensor arrangement, during the transport through the CCD channels the distance between successive signal packets is enlarged and an empty potential well is induced between these packets, which is then transferred as a normal packet together with the signal charges. During the transport, in the said additional well charge is collected which is representative for the smear charge which is trapped during the transport by the corresponding signal packet. When during reading, the smear charge is subtracted from the signal charge, the accurate value of the smear-compensated signals can be determined.

Abstract: In a CCD, especially in an image sensing device, the electrodes of the sensor part and the memory part can be switched between a reference level signal and clock pulse signals. As a result, the information density and hence in the image sensor device the number of image lines to be read out independently can be doubled. Thus, the resolution is improved and it is possible to record even and odd lines simultaneously (for example, for an electronic still camera).

Abstract: Apparatus and method for encoding and recording electronic image information signals in a manner whereby luminance signals for odd field lines are recorded in association respectively with chrominance signals alternately selected from both the even field lines and the odd field lines and luminance signals for even field lines are recorded in association respectively with the remaining chrominance signals alternately selected from both the even field lines and the odd field lines. Chrominance samples recorded in this manner are spaced only two field lines apart thereby allowing the chrominance signals to be interpolated by a playback device specially configured to provide for increased vertical chromianance resolution.

Abstract: An image sensor of the interline type with a light sensor comprising a receptor, e.g. a current generating photo diode, and an integrator, e.g. an adjoining MOS capacitance, which are separated from each other spatially and a C.T.D. line separated therefrom.

Abstract: A CCD solid state image sensor device. During the integration period the surface in the image pick-up section is switched alternately into inversion and into accumulation. Any excess of charge carriers which results from possible overexposure can thus be drained by means of recombination via sufaces states.

Abstract: A charge-coupled image sensor device of the frame-transfer type has an electrode system through which windows (14) allow light to enter the device. One group of electrodes (15 and 16 ) extends transverse to charge transport channels (9 or 11) in the device. Another group of electrodes (18) extends parallel to the channels. Channel bounding regions (12) that electrically separate the channels lie below substantially the entire areas of the windows.

Abstract: In manufacturing a semiconductor device, a semiconductor body (2) is first provided with a first insulating layer (3,4) having a homogeneous dielectric thickness. A first conductor pattern (5) of polycrystalline silicon is then provided on the first insulating layer. A second insulating layer (6) is formed by oxidation of the first conductor pattern in such manner that the dielectric thickness of the first insulating layer remains approximately constant. Insulating paths (8) are then formed in spaces below edges (9) of the second insulating layer by successive deposition and etching steps. During the deposition step, a temporary layer is deposited to a thickness exceeding half the height of the spaces. During the etching step, the temporary layer is removed from the second insulating layer. Finally, a second conductor pattern (7) is provided on and beside the second insulating layer.

Abstract: An imaging panel comprising a buffer register inputs of which are connectable to the outputs of one of the rows or elements or connectable one after the other to outputs of several rows of the elements and whose outputs are coupled to the panel output. The buffer register is connected to a control circuit for shifting in each first field period of the interlaced picture each recorded information of an element row directly and fully, and for shifting in each second field period of the interlaced picture half of each recorded information of an element row, the other half being retained in the buffer register for confining it to half of the information to be shifted of the next row of elements.

Abstract: Semiconductor devices, one having a planar bipolar high-voltage semiconductor circuit element comprising an island-shaped region of one conductivity type. On its lower side the island-shaped region is bounded by a first pn junction having a comparatively high breakdown voltage, and laterally by a second pn junction having a comparatively low breakdown voltage. The doping and the thickness of the island-shaped region are so small that the region is entirely depleted before breakdown occurs.The second semiconductor device having a field effect transistor of the lateral or vertical type with an island-shaped region having a contact region and bounded at the bottom by a pn junction having a comparatively high breakdown voltage and laterally by a second pn junction having a comparatively low breakdown voltage.

Abstract: The invention relates to a JFET memory in which the information at the gate electrodes of the JFET's is stored and read-out non-destructively. Each JFET has an IGFET structure situated entirely within the JFET and the gate of which is coupled to the source or drain of the JFET. The information can be refreshed periodically at cell level (that is without external amplifiers) by means of said IGFET.