Abstract: Presented is a system and method for distributing a network application across a plurality of geographically dispersed network sites. The system comprises a plurality of network sites connected by a shared network and interconnected by a dedicated non-blocking communication network. The system can use different interconnecting network topologies based on the number of sites to be interconnected. The method balances the network application load and resources across the interconnected network sites based on a distribution policy implemented without burdening the shared network. The method provides redundancy capabilities by detecting the loss of a network site and redistributing the network application load to the remaining network sites.

Abstract: One aspect of the invention is directed to a network element (e.g., node/router/switch, etc) which performs internal packet header compression. In particular, an aspect provides a network element comprising a plurality of ingress elements (e.g. line cards), a plurality of egress elements, and system internal network (e.g. a backplane) for switching between the correct Ingress element and egress element, and applying header compression for the purpose of reducing the bandwidth required between the elements. As such internal “metadata” can be added to the compressed header without increasing, and preferably in some embodiments, actually decreasing, the size of the packets. Typically the headers are uncompressed before exiting the egress element.

Abstract: Devices, systems and methods for run-time reassignment of the interconnection between devices pertaining to a Physical (PHY) layer and devices pertaining to a Media Access Control (MAC) layer, with no packet loss or with at most one packet lost are provided. The strategies employed by these devices, systems and methods used REMOTE FAULT, PAUSE and IDLE PATTERN messages. The devices may be interconnected via a reconfigurable optical crossbar.

Abstract: Systems and methods according to these exemplary embodiments provide for optical interconnection using optical splitters and interferometer-based optical switching. Optical signals can be routed from an input port to one or more output ports via at least one splitter and at least one interferometer, e.g., a Mach Zehnder interferometer. According to one exemplary embodiment, signal degradation associated with signal splitting is mitigated by using a binary tree of splitters and interferometers between input ports and output ports.

Abstract: Systems and methods according to these exemplary embodiments provide for dynamically scalable switching fabrics. A dynamically scalable switching fabric can include a first set of fabric element (FE) interfaces and a second set of FE interfaces, interconnectable by a reconfigurable crossbar. By selectively populating the FE interfaces, different switching capabilities, e.g., bandwidth per processor blade and/or number of processor blades supported, can be achieved. When the population of the FE interfaces is modified, the reconfigurable crossbar can reconfigure the links between FEs. According to one embodiment, a three-stage CLOS architecture can be implemented. According to another embodiment, a multi-plane architecture can be implemented.

Abstract: Systems and methods according to these exemplary embodiments provide for optical interconnection using a combination of an arrayed waveguide grating router (AWGr) and optical crossbar. Optical wavelengths can be flexibly routed from an input port to one or more output ports. Scaling of the system is easily accommodated.

Abstract: A crossbar may be coupled between a plurality of PHY devices configured to provide physical layer functions according to an Open Systems Interconnection, OSI, model and a plurality of MAC devices configured to provide data link layer functions according to the OSI model. First data couplings may be provided through the crossbar between the plurality of PHY devices and the plurality of MAC devices during a first time period. Second data couplings may be provided through the crossbar between the plurality of PHY devices and the plurality of MAC devices during a second time period, with the first and second data couplings being different. Related network elements, interfaces, and networks are also discussed.

Abstract: A method of providing protection switching on a backbone network includes configuring a service instance table for a first port of a first bridge. The service instance table includes a Virtual Local Access Network (VLAN) identifier entry for one or more service instances. The method also includes mapping data traffic received at the first bridge onto a first trunk by setting a VLAN identifier entry for a first service instance and transmitting data traffic to a second bridge on the first trunk in accordance with the mapping and monitoring the first trunk for faults by exchanging continuity check messages with the second bridge over the first trunk. The method additionally includes, upon detecting a fault, remapping data traffic for the first service instance by changing the VLAN identifier entry for the first service instance and transmitting data traffic to the second bridge in accordance with the remapping.

Abstract: Systems and methods provide for the processing of data including monitoring functions. A blade enclosure for processing data includes: at least one first blade server configured to only perform routine processing tasks; and at least one second blade server connected to the at least one first blade server and configured to perform monitoring functions, wherein the at least one first blade server is configured to offload received data which requires monitoring to the at least one second blade server, and wherein the routine processing tasks do not include monitoring functions.

Abstract: Fluid-cooling technology developed for printed circuit boards (PCBs) and electronics assemblies is combined with optical-based interconnect technology, thereby enabling efficient fabrication of PCBs with free-space optical bearers. Since cooling components such as fans and heat sinks are no longer required on the PCB, the PCB is thinner and makes better use of a cooling substrate by also using it to carry optical signals. A card or a backplane supporting a plurality of active components can combine optical signals and cooling aspects in support of those components.

Abstract: A system and method of providing Ethernet protection switching in a PBB-TE Domain. Two PBB-TE trunks are established between a first B-component and a second B-component. Each trunk includes two unidirectional Ethernet Switching Paths (ESPs), each associated with a possibly different VLAN identifier. Data traffic is mapped onto the first PBB-TE trunk, where the first PBB-TE trunk corresponds to a working entity and the second PBB-TE trunk corresponds to a backup protection entity. Data traffic is sent via a first ESP of the first trunk associated with a first VID and a second ESP of the first trunk associated with a second VID. The two PBB-TE trunks are monitored for faults. Upon detecting a fault on one of the PBB-TE trunks, data traffic is remapped onto the other PBB-TE trunk via a third ESP associated with a third VID and a fourth ESP associated with a fourth VID.

Abstract: Systems and methods according to these exemplary embodiments provide for optical interconnection using dual micro-ring resonators in a multilayer structure. Multi-wavelength optical signals can be redirected on a wavelength-by-wavelength basis, or larger, from input ports on a first layer to output ports on a second layer of an optical device.

Abstract: The invention relates to an optical backplane, comprising a plurality of component connectors and at least two interconnections configurations interconnecting the component connectors. The at least two interconnections configurations allow a dynamical selection of an interconnections configuration interconnecting the component connectors.

Abstract: Fluid-cooling technology developed for printed circuit boards (PCBs) and electronics assemblies is combined with optical-based interconnect technology, thereby enabling efficient fabrication of PCBs with free-space optical bearers. Since cooling components such as fans and heat sinks are no longer required on the PCB, the PCB is thinner and makes better use of a cooling substrate by also using it to carry optical signals. A card or a backplane supporting a plurality of active components can combine optical signals and cooling aspects in support of those components.

Abstract: A method and nodes for aggregating data traffic over an access domain between service providers and user domains. An access edge node is introduced in the access domain between service providers and user domains. The access edge node hosts service agents, each service agent controlling a Virtual Local Area Network (VLAN) over the access domain for one of the service providers. The access edge node verifies whether a service agent, corresponding to the service provider identified in a received service request, exists. If so, the user domain is added to the VLAN corresponding to the requested service provider by creating a service binding at the access edge node. An access node providing access to the access domain to the user domain is informed of the service binding. Data traffic between the user domain and the identified service provider is aggregated over the access domain according to the created service binding.

Abstract: In a provider backbone—traffic engineering network, a method and a bridge node are provided for setting up path between edge bridges connected to customer premises. A first edge bridge advertises towards peer edge bridges a tuple comprising a port identity and a layer two address. When it needs to set up a path towards the first edge bridge, one of the peer edge bridges uses information in the tuple to compute a path label.

Abstract: Systems, devices and methods according to these exemplary embodiments provide for memory management techniques and systems for storing data. Data is segmented for storage in memory. According to one exemplary embodiment, each fragment is routed via a different memory bank and forwarded until they reach a destination memory bank wherein the fragments are reassembled for storage. According to another exemplary embodiment, data is segmented and stored serially in memory banks.

Abstract: The present invention relates to a method and nodes for managing service bindings over an access domain. For doing so, an access edge node is introduced in the access domain between a plurality of service providers and user domains, and an access node is introduced between the user domains and the access domain. The access edge node creates, modifies and removes service bindings and informs the access node of those creations, modifications and removals. Each service binding binds one of the user domain, the access node and the access edge node on data traffic handling over the access domain between the user domain and the service provider domain. More particularly, the service binding associates the user domain to a Virtual Local Area Network (VLAN) for the service provider domain on the access domain, controlled by the access edge node.

Abstract: The invention relates to a method and circuit for aligning a serial bit stream with a parallel output. The method comprises latching Q bits from the serial bit stream into a register, locating a position P of a first bit of a start of frame delimiter (SFD) in the register and discarding P-1 bits from the serial bit stream, before the position of the first bit of the SFD, thereby aligning the serial bit stream with the parallel output. The circuit comprises a latch, a fault tolerant analysis logic (FTAL) for locating a position P of a first bit of a start of frame delimiter (SFD) in the register and a shift register for discarding P-1 bits from the serial bit stream, before the position of the first bit of the SFD, thereby aligning the serial bit stream with the parallel output.

Abstract: The invention relates to a method and circuit for aligning a serial bit stream with a parallel output. The method comprises latching Q bits from the serial bit stream into a register, locating a position P of a first bit of a start of frame delimiter (SFD) in the register and discarding P-1 bits from the serial bit stream, before the position of the first bit of the SFD, thereby aligning the serial bit stream with the parallel output. The circuit comprises a latch, a fault tolerant analysis logic (FTAL) for locating a position P of a first bit of a start of frame delimiter (SFD) in the register and a shift register for discarding P-1 bits from the serial bit stream, before the position of the first bit of the SFD, thereby aligning the serial bit stream with the parallel output.