Patents by Inventor Martin O'Riordan

Martin O'Riordan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230132254
    Abstract: A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Inventors: Brendan Barry, Fergal Connor, Martin O'Riordan, David Moloney, Sean Power
  • Patent number: 11579872
    Abstract: A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: February 14, 2023
    Assignee: Movidius Limited
    Inventors: Brendan Barry, Fergal Connor, Martin O'Riordan, David Moloney, Sean Power
  • Publication number: 20210383258
    Abstract: Methods, devices and system for designing and deploying one or more data processing pipelines on an embedded system. These data processing pipelines may be deployed without requiring the application running on the embedded system to be rebuilt, redeployed, or halted.
    Type: Application
    Filed: June 3, 2021
    Publication date: December 9, 2021
    Inventors: Martin O'Riordan, Álvaro Guerrero del Pozo, Aubrey Dunne, Fintan Buckley
  • Publication number: 20200192666
    Abstract: A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.
    Type: Application
    Filed: February 21, 2020
    Publication date: June 18, 2020
    Inventors: Brendan Barry, Fergal Connor, Martin O'Riordan, David Moloney, Sean Power
  • Patent number: 10572252
    Abstract: A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: February 25, 2020
    Assignee: Movidius Limited
    Inventors: Brendan Barry, Fergal Connor, Martin O'Riordan, David Moloney, Sean Power
  • Patent number: 10001993
    Abstract: A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: June 19, 2018
    Assignee: Linear Algebra Technologies Limited
    Inventors: Brendan Barry, Fergal Connor, Martin O'Riordan, David Moloney, Sean Power
  • Publication number: 20170293346
    Abstract: A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.
    Type: Application
    Filed: December 16, 2016
    Publication date: October 12, 2017
    Inventors: Brendan BARRY, Fergal CONNOR, Martin O'RIORDAN, David MOLONEY, Sean POWER
  • Publication number: 20150046673
    Abstract: A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.
    Type: Application
    Filed: August 12, 2014
    Publication date: February 12, 2015
    Inventors: Brendan BARRY, Fergal CONNOR, Martin O'RIORDAN, David MOLONEY, Sean POWER
  • Patent number: 5617569
    Abstract: A method and system in an object-oriented environment for determining the offset of a data member of a derived class when the derived class has a virtually inherited base class and the data member is defined in the base class. In a preferred embodiment, the base class has a data structure and a class address. The base class data structure has the data member located at a data member offset from the base class address. The derived class has a data structure and a class address. The derived class data structure includes an occurrence of the base class data structure. The occurrence of the base class data structure is located at a base class offset from the derived class address.
    Type: Grant
    Filed: April 10, 1995
    Date of Patent: April 1, 1997
    Assignee: Microsoft Corporation
    Inventors: Jan Gray, D. T. Jones, Martin O'Riordan
  • Patent number: 5603030
    Abstract: A method and system for generating code to destroy objects is provided. In a preferred embodiment, a compiler generates a plurality of destructor functions for the class. Each destructor function performs a subset of the destruction process. The compiler generates code to invoke one of the plurality of destructor functions to destroy an object of the class. In a preferred embodiment, destructor functions are generated to destroy an object that is not ultimately derived, to destroy an object that is ultimately derived, to destroy an object that is ultimately derived and to deallocate the object memory, to destroy an array of objects, and to destroy an array of objects and to deallocate the memory of the array.
    Type: Grant
    Filed: January 7, 1993
    Date of Patent: February 11, 1997
    Assignee: Microsoft Corporation
    Inventors: Jan Gray, Martin O'Riordan
  • Patent number: 5432936
    Abstract: A method and system in an object-oriented environment for determining the offset of a data member of a derived class when the derived class has a virtually inherited base class and the data member is defined in the base class. In a preferred embodiment, the base class has a data structure and a class address. The base class data structure has the data member located at a data member offset from the base class address. The derived class has a data structure and a class address. The derived class data structure includes an occurrence of the base class data structure. The occurrence of the base class data structure is located at a base class offset from the derived class address.
    Type: Grant
    Filed: April 9, 1992
    Date of Patent: July 11, 1995
    Assignee: Microsoft Corporation
    Inventors: Jan Gray, D. T. Jones, Martin O'Riordan
  • Patent number: 5371891
    Abstract: An improved method and system for implementing constructors and destructors in a compiler for an object-oriented programming language is provided. In a preferred embodiment of the present invention, a construction displacement value is added to the this pointer for a virtual function that is invoked by a constructor for a class that virtually inherits a base class. The construction displacement value corresponds to the difference between the offset of an occurrence of a virtually inherited class within an instance of the base class and the offset of the occurrence of the virtually inherited class from the occurrence of the base class within an instance of a derived class that inherits the base class.
    Type: Grant
    Filed: April 9, 1992
    Date of Patent: December 6, 1994
    Assignee: Microsoft Corporation
    Inventors: Jan Gray, David Jones, Martin O'Riordan