Patents by Inventor Martin Standing

Martin Standing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor packages and methods of forming the same
    Patent number: 9281260
    Abstract: In one embodiment, a method of fabricating a semiconductor package includes forming a first plurality of die openings on a laminate substrate. The laminate substrate has a front side and an opposite back side. A plurality of first dies is placed within the first plurality of die openings. An integrated spacer is formed around each die of the plurality of first dies. The integrated spacer is disposed in gaps between the laminate substrate and an outer sidewall of each die of the plurality of first dies. The integrated spacer holds the die within the laminate substrate by partially extending over a portion of a top surface of each die of the plurality of first dies. Front side contacts are formed over the front side of the laminate substrate.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: March 8, 2016
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Martin Standing, Andrew Roberts
  • Semiconductor Package with Integrated Semiconductor Devices and Passive Component
    Publication number: 20160013168
    Abstract: According to one exemplary embodiment, a semiconductor package includes a substrate having lower and upper surfaces. The semiconductor package further includes at least one passive component coupled to first and second conductive pads on the upper surface of the substrate. The semiconductor package further includes at least one semiconductor device coupled to a first conductive pad on the lower surface of the substrate. The at least one semiconductor device has a first electrode for electrical and mechanical connection to a conductive pad external to the semiconductor package. The at least one semiconductor device can have a second electrode electrically and mechanically coupled to the first conductive pad on the lower surface of the substrate.
    Type: Application
    Filed: September 24, 2015
    Publication date: January 14, 2016
    Inventor: Martin Standing
  • PASSIVE COMPONENT INTEGRATED WITH SEMICONDUCTOR DEVICE IN SEMICONDUCTOR PACKAGE
    Publication number: 20160013169
    Abstract: According to one exemplary embodiment, a semiconductor package includes a substrate having lower and upper surfaces. The semiconductor package further includes at least one passive component coupled to first and second conductive pads on the upper surface of the substrate. The semiconductor package further includes at least one semiconductor device coupled to a first conductive pad on the lower surface of the substrate. The at least one semiconductor device has a first electrode for electrical and mechanical connection to a conductive pad external to the semiconductor package. The at least one semiconductor device can have a second electrode electrically and mechanically coupled to the first conductive pad on the lower surface of the substrate.
    Type: Application
    Filed: September 24, 2015
    Publication date: January 14, 2016
    Inventor: Martin Standing
  • Electronic component and method for dissipating heat from a semiconductor die
    Publication number: 20160005673
    Abstract: In an embodiment, an electronic component includes a dielectric core layer having a thickness, at least one semiconductor die embedded in the dielectric core layer and electrically coupled to at least one contact pad arranged on a first side of the dielectric core layer, and a heat dissipation layer arranged on a second side of the dielectric core layer and thermally coupled to the semiconductor die. The semiconductor die has a thickness that is substantially equal to, or greater than, or equal to the thickness of the dielectric core layer. The heat dissipation layer includes a material with a substantially isotropic thermal conductivity.
    Type: Application
    Filed: July 7, 2014
    Publication date: January 7, 2016
    Inventors: Martin Standing, Marcus Pawley
  • Electronic component and method for electrically coupling a semiconductor die to a contact pad
    Publication number: 20160005684
    Abstract: In an embodiment, an electronic component includes a dielectric core layer, one or semiconductor dies comprising a first major surface, a first electrode arranged on the first major surface and a second major surface that opposes the first major surface. One or more slots are arranged within the dielectric core layer adjacent the semiconductor die and a redistribution structure electrically couples the first electrode to a component contact pad arranged adjacent the second major surface of the semiconductor die. The semiconductor die is embedded in the dielectric core layer and a portion of the redistribution structure is arranged on side walls of the slot.
    Type: Application
    Filed: July 7, 2014
    Publication date: January 7, 2016
    Inventors: Martin Standing, Marcus Pawley
  • Method and Device for Electrically Coupling a Plurality of Semiconductor Device Layers by a Common Conductive Layer
    Publication number: 20160007470
    Abstract: An assembly includes a first laminate electronic component and a second laminate electronic component. The first laminate electronic component includes a first dielectric layer, at least one first semiconductor die embedded in the first dielectric layer and at least one first contact pad including a first conductive via. The second laminate electronic component includes a second dielectric layer, at least one second semiconductor die embedded in the second dielectric layer and at least one second contact pad including a second conductive via. The first conductive via is electrically coupled to the second conductive via by a common conductive layer.
    Type: Application
    Filed: July 7, 2014
    Publication date: January 7, 2016
    Inventors: Martin Standing, Andrew Roberts
  • Methods for Manufacturing an Electronic Module
    Publication number: 20150371979
    Abstract: A method for manufacturing an electronic module is disclosed. In an embodiment the method includes providing a passive component having an upper surface of a first area, and electrically and mechanically attaching a first semiconductor chip having a lower surface of a second area that is smaller than the first area to the passive component, wherein the lower surface of the first semiconductor chip is arranged on the upper surface of the passive component, and wherein the first semiconductor chip comprises a vertical field-effect transistor.
    Type: Application
    Filed: June 20, 2015
    Publication date: December 24, 2015
    Inventors: Martin Standing, Johannes Schoiswohl
  • EMBEDDED CHIP PACKAGING TECHNOLOGY
    Publication number: 20150371935
    Abstract: Representative implementations of devices and techniques provide a semiconductor package comprising a laminate substrate. The laminate substrate includes at least one conductive layer laminated to a surface of an insulating core. The laminate substrate also includes one or more die openings, in which one or more semiconductor die are located.
    Type: Application
    Filed: June 23, 2014
    Publication date: December 24, 2015
    Inventors: Martin STANDING, Andrew ROBERTS
  • Power Semiconductor Package
    Publication number: 20150340304
    Abstract: A semiconductor package that includes a substrate having a metallic back plate, an insulation body and a plurality of conductive pads on the insulation body, and a semiconductor die coupled to said conductive pads, the conductive pads including regions readied for direct connection to pads external to the package using a conductive adhesive.
    Type: Application
    Filed: June 3, 2015
    Publication date: November 26, 2015
    Inventor: Martin Standing
  • Semiconductor Package with Multiple Dies
    Publication number: 20150332988
    Abstract: A semiconductor package that includes a substrate having a metallic back plate, an insulation body and a plurality of conductive pads on the insulation body, and a semiconductor die coupled to said conductive pads, the conductive pads including regions readied for direct connection to pads external to the package using a conductive adhesive.
    Type: Application
    Filed: May 20, 2015
    Publication date: November 19, 2015
    Inventor: Martin Standing
  • HIGH EFFICIENCY EMBEDDING TECHNOLOGY
    Publication number: 20150319864
    Abstract: Representative implementations of devices and techniques provide improved electrical access to components, such as chip dice, for example, disposed within layers of a multi-layer printed circuit board (PCB). One or more insulating layers may be located on either side of a spacer layer containing the components. The insulating layers may have apertures strategically located to provide electrical connectivity between the components and conductive layers of the PCB.
    Type: Application
    Filed: July 14, 2015
    Publication date: November 5, 2015
    Inventor: Martin STANDING
  • Semiconductor device and passive component integration in a semiconductor package
    Patent number: 9147644
    Abstract: According to one exemplary embodiment, a semiconductor package includes a substrate having lower and upper surfaces. The semiconductor package further includes at least one passive component coupled to first and second conductive pads on the upper surface of the substrate. The semiconductor package further includes at least one semiconductor device coupled to a first conductive pad on the lower surface of the substrate. The at least one semiconductor device has a first electrode for electrical and mechanical connection to a conductive pad external to the semiconductor package. The at least one semiconductor device can have a second electrode electrically and mechanically coupled to the first conductive pad on the lower surface of the substrate.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: September 29, 2015
    Assignee: International Rectifier Corporation
    Inventor: Martin Standing
  • Power Semiconductor Package with Conductive Clips
    Publication number: 20150262960
    Abstract: A power semiconductor package that includes a semiconductor die having at least two power electrodes and a conductive clip electrically and mechanically coupled to each power electrode.
    Type: Application
    Filed: May 27, 2015
    Publication date: September 17, 2015
    Inventors: Martin Standing, Robert J. Clarke
  • Power Semiconductor Package
    Publication number: 20150255376
    Abstract: A semiconductor package that includes a conductive can, a power semiconductor device electrically and mechanically attached to the inside surface of the can, and an IC semiconductor device copackaged with the power semiconductor device inside the can.
    Type: Application
    Filed: May 20, 2015
    Publication date: September 10, 2015
    Inventor: Martin Standing
  • Semiconductor Package with Conductive Clip
    Publication number: 20150255382
    Abstract: A semiconductor package that includes a conductive can, a power semiconductor device electrically and mechanically attached to the inside surface of the can, and an IC semiconductor device copackaged with the power semiconductor device inside the can.
    Type: Application
    Filed: May 19, 2015
    Publication date: September 10, 2015
    Inventor: Martin Standing
  • Electronic Component, Arrangement and Method
    Publication number: 20150216054
    Abstract: A method includes applying solder paste to a portion of a circuit board, arranging a first contact pad of a first electronic component adjacent the layer of solder paste, the first electronic component comprising a dielectric layer, at least one semiconductor die embedded in the dielectric layer, the at least one first contact pad being electrically coupled to the semiconductor die and arranged on a lower side of the dielectric layer, and at least one second contact pad positioned on an upper side of the dielectric layer, and melting the solder paste to produce a molten solder that flows onto at least one of the first contact pad and the second contact pad of the first electronic component.
    Type: Application
    Filed: January 28, 2014
    Publication date: July 30, 2015
    Inventor: Martin Standing
  • Electronic Component
    Publication number: 20150206820
    Abstract: An electronic component includes one or more semiconductor dice embedded in a first dielectric layer, means for a spreading heat in directions substantially parallel to a major surface of the one or more semiconductor dice embedded in a second dielectric layer and means for dissipating heat in directions substantially perpendicular to the major surface of the one or more semiconductor dice.
    Type: Application
    Filed: January 21, 2014
    Publication date: July 23, 2015
    Applicant: Infineon Technologies Austria AG
    Inventor: Martin Standing
  • Method of embedding an electronic component into an aperture of a substrate
    Patent number: 9084382
    Abstract: Representative implementations of devices and techniques provide improved electrical access to components, such as chip dice, for example, disposed within layers of a multi-layer printed circuit board (PCB). One or more insulating layers may be located on either side of a spacer layer containing the components. The insulating layers may have apertures strategically located to provide electrical connectivity between the components and conductive layers of the PCB.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: July 14, 2015
    Assignee: Infineon Technologies Austria AG
    Inventor: Martin Standing
  • Electronic module
    Patent number: 9070642
    Abstract: An electronic module includes a first semiconductor chip and a passive component, wherein the first semiconductor chip is arranged on a surface of the passive component.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: June 30, 2015
    Assignee: Infineon Technologies AG
    Inventors: Martin Standing, Johannes Schoiswohl
  • Power semiconductor package
    Patent number: 9054090
    Abstract: A semiconductor package that includes a substrate having a metallic back plate, an insulation body and a plurality of conductive pads on the insulation body, and a semiconductor die coupled to said conductive pads, the conductive pads including regions readied for direct connection to pads external to the package using a conductive adhesive.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: June 9, 2015
    Assignee: International Rectifier Corporation
    Inventor: Martin Standing