Abstract: A method of manufacturing a semiconductor die includes: forming a power HEMT (high-electron-mobility transistor) in a III-nitride semiconductor substrate, the power HEMT having a gate, a source and a drain; monolithically integrating a first gate driver HEMT with the power HEMT in the III-nitride semiconductor substrate, the first gate driver HEMT having a gate, a source and a drain and logically forming part of a driver; and electrically connecting the first gate driver HEMT to the gate of the power HEMT so that the first gate driver HEMT is operable to turn the power HEMT off or on responsive to an externally-generated control signal received from the driver or other device.

Abstract: A semiconductor device includes a transistor in a semiconductor body having a first main surface. The transistor includes: a source contact electrically connected to a source region; a drain contact electrically connected to a drain region; a gate electrode at the channel region, the channel region and a drift zone disposed along a first direction between the source and drain regions, the first direction being parallel to the first main surface, the channel region patterned into a ridge by adjacent gate trenches formed in the first main surface, the adjacent gate trenches spaced apart in a second direction perpendicular to the first direction, a longitudinal axis of the ridge extending in the first direction and a longitudinal axis of the gate trenches extending in the first direction; and at least one of the source and drain contacts being adjacent to a second main surface opposite the first main surface.

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. The gate electrode is disposed adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the main surface between the source region and the drain region. The gate dielectric has a thickness that varies at different positions of the gate electrode.

Abstract: A semiconductor device includes first and second field electrode structures that extend from a first surface into a semiconductor portion. The first field electrode structures include a first field dielectric insulating spicular first field electrodes against the semiconductor portion. The second field electrode structures include a second field dielectric insulating spicular second field electrodes against the semiconductor portion. The second field dielectric is thicker than the first field dielectric. Openings of the first and second field electrode structures in the first surface may be non-circular symmetric, wherein the openings of the second field electrode structures are tilted with respect to the openings of the first field electrode structures. Alternatively or in addition, the openings of the second field electrode structures in the first surface may be greater than the openings of the first field electrode structures.

Abstract: A method for manufacturing a semiconductor device includes: providing a semiconductor substrate having a first side; forming a trench in the semiconductor substrate, the trench having a bottom and a sidewall extending from the bottom to the first side of the semiconductor substrate; forming an insulation structure including at least a first insulation layer and a second insulation layer on the sidewall and the bottom of the trench; forming a lower conductive structure in the lower portion of the trench; removing the second insulation layer in an upper portion of the trench while leaving the second insulation layer at least partially in a lower portion of the trench; and forming an upper conductive structure in the upper portion of the trench.

Abstract: A method of forming a semiconductor device is provided. The device includes a semiconductor substrate having a main surface and a rear surface vertically spaced apart from the main surface, a first doped region, a second doped region and a third doped region. The third doped region is interposed between the first and second doped regions beneath the main surface. Field plate trenches having field plates vertically extend from the main surface to a bottom that is arranged in the first doped region. A gate trench having a gate electrode vertically extends from the main surface to the first doped region. A compensation zone vertically extends from the bottom of the gate trench deeper into the first doped region. The compensation zone is laterally aligned with the gate trench and is adjacent to the field plates along a cross-sectional plane of the device that is parallel to the main surface.

Abstract: A method for manufacturing a semiconductor device includes: providing a semiconductor substrate having a first side; forming a trench in the semiconductor substrate, the trench having a bottom and a sidewall extending from the bottom to the first side of the semiconductor substrate; forming an insulation structure including at least a first insulation layer and a second insulation layer on the sidewall and the bottom of the trench; forming a lower conductive structure in the lower portion of the trench; removing the second insulation layer in an upper portion of the trench while leaving the second insulation layer at least partially in a lower portion of the trench; and forming an upper conductive structure in the upper portion of the trench.

Abstract: A semiconductor die includes a semiconductor substrate having a first region and a second region isolated from the first region. A power transistor disposed in the first region of the semiconductor substrate has a gate, a source and a drain. A gate driver transistor disposed in the second region of the semiconductor substrate has a gate, a source and a drain. The gate driver transistor is electrically connected to the gate of the power transistor and operable to turn the power transistor off or on responsive to an externally-generated control signal applied to the gate of the gate driver transistor. A first contact pad is electrically connected to the source of the power transistor, and a second contact pad is electrically connected to the drain of the power transistor. A third contact pad is electrically connected to the gate of the gate driver transistor for receiving the externally-generated control signal.

Abstract: A semiconductor device includes first and second field electrode structures that extend from a first surface into a semiconductor portion. The first field electrode structures include a first field dielectric insulating spicular first field electrodes against the semiconductor portion. The second field electrode structures include a second field dielectric insulating spicular second field electrodes against the semiconductor portion. The second field dielectric is thicker than the first field dielectric. Openings of the first and second field electrode structures in the first surface may be non-circular symmetric, wherein the openings of the second field electrode structures are tilted with respect to the openings of the first field electrode structures. Alternatively or in addition, the openings of the second field electrode structures in the first surface may be greater than the openings of the first field electrode structures.

Abstract: A semiconductor device includes a semiconductor body, having a first surface, a gate electrode structure, which includes polycrystalline silicon, of an IGFET in a first trench extending from the first surface into the semiconductor body. The device also includes a semiconductor element, which is different from the gate electrode structure of the IGFET and includes polycrystalline silicon, in a second trench extending from the first surface into the semiconductor body, wherein the polycrystalline silicon of the IGFET and of the semiconductor element different therefrom ends below a top side of an insulation layer adjoining the first surface of the semiconductor body.

Abstract: A method of manufacturing a semiconductor die includes: forming a power HEMT (high-electron-mobility transistor) in a III-nitride semiconductor substrate, the power HEMT having a gate, a source and a drain; monolithically integrating a first gate driver HEMT with the power HEMT in the III-nitride semiconductor substrate, the first gate driver HEMT having a gate, a source and a drain and logically forming part of a driver; and electrically connecting the first gate driver HEMT to the gate of the power HEMT so that the first gate driver HEMT is operable to turn the power HEMT off or on responsive to an externally-generated control signal received from the driver or other device.

Abstract: A semiconductor device includes first and second field electrode structures that extend from a first surface into a semiconductor portion. The first field electrode structures include a first field dielectric insulating spicular first field electrodes against the semiconductor portion. The second field electrode structures include a second field dielectric insulating spicular second field electrodes against the semiconductor portion. The second field dielectric is thicker than the first field dielectric. Openings of the first and second field electrode structures in the first surface may be non-circular symmetric, wherein the openings of the second field electrode structures are tilted with respect to the openings of the first field electrode structures. Alternatively or in addition, the openings of the second field electrode structures in the first surface may be greater than the openings of the first field electrode structures.

Abstract: A method for manufacturing a semiconductor device includes: providing a semiconductor substrate having a first side; forming a trench in the semiconductor substrate, the trench having a bottom and a sidewall extending from the bottom to the first side of the semiconductor substrate; forming an insulation structure including at least a first insulation layer and a second insulation layer on the sidewall and the bottom of the trench; forming a lower conductive structure in the lower portion of the trench; removing the second insulation layer in an upper portion of the trench while leaving the second insulation layer at least partially in a lower portion of the trench; and forming an upper conductive structure in the upper portion of the trench, wherein at least one of the lower conductive structure and the upper conductive structure comprises a metal, a metal alloy, a metal silicide, or a combination thereof.

Abstract: A semiconductor device includes a transistor in a semiconductor body having a first main surface. The transistor includes: a source contact electrically connected to a source region; a drain contact electrically connected to a drain region; a gate electrode at the channel region, the channel region and a drift zone disposed along a first direction between the source and drain regions, the first direction being parallel to the first main surface, the channel region patterned into a ridge by adjacent gate trenches formed in the first main surface, the adjacent gate trenches spaced apart in a second direction perpendicular to the first direction, a longitudinal axis of the ridge extending in the first direction and a longitudinal axis of the gate trenches extending in the first direction; and at least one of the source and drain contacts being adjacent to a second main surface opposite the first main surface.

Abstract: A semiconductor die includes a III-nitride semiconductor substrate, a power HEMT (high-electron-mobility transistor) disposed in the III-nitride semiconductor substrate, and a first gate driver HEMT monolithically integrated with the power HEMT in the III-nitride semiconductor substrate. The power HEMT and the first gate driver HEMT each have a gate, a source and a drain. The first gate driver HEMT logically forms part of a driver, and is electrically connected to the gate of the power HEMT. The first gate driver HEMT is operable to turn the power HEMT off or on responsive to an externally-generated control signal received from the driver or other device. Additional embodiments of semiconductor dies and methods of manufacturing are also described.

Abstract: A transistor device includes a compound semiconductor body, a drain disposed in the compound semiconductor body and a source disposed in the compound semiconductor body and spaced apart from the drain by a channel region. A gate is provided for controlling the channel region. The transistor device further includes a gate overvoltage protection device connected between the source and the gate, the gate overvoltage protection device including p-type and n-type silicon-containing semiconductor material.

Abstract: A semiconductor device comprises a transistor formed in a semiconductor body having a first main surface. The transistor comprises a source region, a drain region, a channel region, a drift zone, a source contact electrically connected to the source region, a drain contact electrically connected to the drain region, and a gate electrode at the channel region. The channel region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The channel region has a shape of a first ridge extending along the first direction. One of the source contact and the drain contact is adjacent to the first main surface, the other one of the source contact and the drain contact is adjacent to a second main surface that is opposite to the first main surface.

Abstract: A method of manufacturing an integrated circuit includes: growing an epitaxial layer on a process surface of a base substrate; forming, by processes applied to an exposed first surface of the epitaxial layer, first transistor cells in the epitaxial layer, each first transistor cell including a first gate electrode; and forming, by processes applied to a surface opposite to the first surface, second transistor cells, each second transistor cell including a second gate electrode.

Abstract: Embodiments relate to bootstrap circuits integrated with at least one other device, such as a power transistor or other semiconductor device. In embodiments, the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap diode, or the bootstrap circuit can comprise a bootstrap capacitor and a bootstrap transistor. The bootstrap capacitor comprises a semiconductor-based capacitor, as opposed to an electrolytic, ceramic or other capacitor, in embodiments. The integration of the bootstrap circuit with another circuit or device, such as a power transistor device in one embodiment, is at a silicon-level in embodiments, rather than as a module-like system-in-package of conventional approaches. In other words, the combination of the bootstrap circuit elements and power transistor or other device forms a system-on-silicon, or an integrated circuit, in embodiments, and additionally can be arranged in a single package.

Abstract: A method of forming a semiconductor device is provided. The device includes a semiconductor substrate having a main surface and a rear surface vertically spaced apart from the main surface, a first doped region, a second doped region and a third doped region. The third doped region is interposed between the first and second doped regions beneath the main surface. Field plate trenches having field plates vertically extend from the main surface to a bottom that is arranged in the first doped region. A gate trench having a gate electrode vertically extends from the main surface to the first doped region. A compensation zone vertically extends from the bottom of the gate trench deeper into the first doped region. The compensation zone is laterally aligned with the gate trench and is adjacent to the field plates along a cross-sectional plane of the device that is parallel to the main surface.