Abstract: A method and apparatus for performing direct memory address (DMA) operations between a requestor and responder device by prestoring, for each device, a logical token and offset value which is recognizable by the device as an indicia to identify one or more local memory addresses within the device, and initiating a DMA operation within the requestor device by the requestor device transferring the token and offset value to the responder device, the responder device identifying a responder device local memory address by translation of the token and offset value, and the responder device accessing the identified responder local memory address for data transfer, associated with the token and offset, and the requestor device identifying a requestor device local memory address for completing the data transfer.

Abstract: A computer system for using logical channel groups to indirectly address channels. The computer system includes a processor, a memory, and an input/output (IO) system for transferring information between devices and the processor. The IO system includes channels, channel path identifiers for identifying the channels, logical channel groups having lists of the channel path identifiers, and subchannels having pointers to the logical channel groups. The IO system also includes one or more switches for routing information between the channels and devices.

Abstract: A method and system for pipelining the processing of channel command words is provided. The channel is permitted to send commands and data to the control unit for several channel command words associated with a channel program without having to wait for responses from the control unit for prior commands sent. The channel can pipeline several commands to the control unit and the control unit can then process the commands in the order it receives them. The control unit sends responses to the channel for each command it receives acknowledging receipt of the commands.

Abstract: A shared channel subsystem has an input-output element for coupling each of a plurality of input-output controllers to each of a plurality of processor nodes by means of a self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individually phase aligned with the clock signal, providing a cost effective, modular input/output element.

Abstract: A method for resolving race conditions in cascaded switches. More specifically, cross links between the cascaded switches are assigned preferred directions relative to each of the switches. A connection request or a response emanating from a switch will always use a send preference cross link if such link is available.

Abstract: A computer I/O system which includes a dynamic switch having a plurality of ports and a plurality of link-level facilities, with each link-level facility being attached to an individual one of the ports. Whenever the state of a port or its attached link-level facility is changed in such a way that the attached link-level facility's ability to communicate with another link-level facility might be affected, this fact is recognized by a dynamic switch control unit which causes a state change notification (SCN) frame to be transmitted to all other link-level facilities which might be affected. The link-level facilities receiving such a state change notification then determine if any of the associations or potential associations with the link-level facility which caused the state change notification are affected.

Abstract: Provides a method for increasing the connectivity of I/O resources to a multiplicity of operating systems (OSs) running in different resource partitions of a computer electronic complex (CEC) to obtain sharing of the I/O resources among the OSs of the CEC, including channels, subchannels (devices), and control units (CUs). The invention provides image identifiers (IIDs) for assigning resources to the different OSs. Each shared I/O resource has a sharing set of control blocks (CBs) in which a respective CB is assigned to (and located by) a respective IID of one of the OSs. Each of the CBs in a sharing set provides a different image of the same I/O resource. The different CB images are independently set to different states by I/O operations for the different OSs, so that the OSs can independently share the same I/O resource.

Abstract: Retrying a command from a CCW in a data processing I/O system having a channel connected to a control unit in which the channel detects an error condition and requests the control unit to retry the current command of an I/O operation. The control unit then determines if the requested retry can be accomplished, and, if it can, sends a response back to the channel requesting the channel to initiate a retry. After receiving the response, the channel checks to determine if conditions are still present which allow a retry, and if they are, executes the current command to perform the retry. If the control unit determines that a retry cannot be accomplished, the control unit has the option to perform a unit check procedure. If the control unit determines that neither a retry nor a unit check can be accomplished, the control unit has the option to perform a selective reset function.

Abstract: A computer system, including at least one host (processor and operating system), a channel subsystem and at least one switch (together with an associated switch controller) for switchably connecting an I/O device (together with an associated I/O device control unit) to a host via said channel subsystem, in combination with means for dynamically managing I/O connectivity in said computer from each host. The I/O manager's functions are centralized at the host level across the computer system. Each host is responsible for an instance of the manager.

Abstract: In a computer I/O system including a plurality of link-level facilities and a dynamic switch having a plurality of ports, each link-level facility being attached to an individual one of the ports, a mechanism and method for assigning a unique link level address to each of the link-level facilities. As each of the link-level facilities comes on line, it sends an acquire link address (ALA) frame and waits for a response (ACK) frame. The ALA frame may be addressed to a general to-whom-it-may-concern address and have a source address of who-am-I. Only a dynamic switch normally assigns link addresses. When receiving an ALA frame, the dynamic switch returns an ACK frame having a unique link address assigned to the sender of the ALA frame. Provision is made for determining if there is a dynamic switch present, or, if the link-level facilities are connected together by a static connection through the dynamic switch, for the link-level facility of a channel to assign the unique link addresses.

Abstract: Dynamic switch protocols are implemented on a token bus protocol in a shared medium network to improve the basic token bus functional capabilities and link utilization, and to produce a uniform transaction protocol that supports both token bus and dynamic switch networks. Frame formats common to both token bus and dynamic switch protocols are utilized, and circuit switched protocols are superimposed on a token bus protocol in interlocked and data transmissions to establish a circuit switched path between a token holder sender node and a destination node. An initial frame transmission uses a normal link header and establishes the circuit switched path between the sender node and the destination node. Subsequent data frames contain no link header information, thereby improving transmission efficiency, and the last frame in such a transmission disconnects the switched circuit path, thereby allowing other transmissions to resume.

Abstract: A connection recovery apparatus for placing a dynamic connection of a dynamic switch of a computer I/O system in a known state upon the detection of a possible switching error. The I/O system includes transmitting stations each having a link-level facility attached by a link to a dynamic-switch port of a dynamic-switch. The dynamic-switch makes dynamic connections between any two of the stations. Upon the detection of a possible switching error, the detecting link-level facility of a station or its attached dynamic-switch port starts a switch recovery procedure which places any dynamic connection to that station in a known disconnected state.

Abstract: A dynamic switch and its protocol for establishing dynamic connections in a link by the use of frames, each frame having an identification of the source of the frame, an identification of the destination of the frame for the requested connection, and link controls to maintain, initiate or terminate a connection between the source and the destination. The frames are bounded by a start of frame delimiter and an end of frame delimiter which may also act as a connect link control and a disconnect link control, respectively, and the connections are made through the dynamic switch having dynamic-switch ports. The state of a dynamic-switch port is changed dependent on its present state, the dynamic connection requested, and the direction and type of frames passing through the dynamic-switch port.