Patents by Inventor Masaaki Aoyama

Masaaki Aoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240089344
    Abstract: A transmitting terminal can transmit a content held by itself to a specific receiving terminal having no email software as if using a mailer. The transmitting terminal (10) and the receiving terminal (20) are connected to a delivery server (30) via a network (4). The delivery server (30) comprises: a database (36) for registering the device ID that specifies the receiving terminal (20); a content storage (39) for temporarily storing a content transmitted from the transmitting terminal (10); and table (33, 37) for managing contents separately on a per device ID basis of the receiving terminal. The delivery server (30), when receiving a request from the receiving terminal (20), refers to the tables (33, 27) and transmits to the receiving terminal (20) a content, the transmission destination of which corresponds to the device ID of the receiving terminal (20).
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Hiroki Mizosoe, Junji Shiokawa, Kazuto Yoneyama, Kunihiro Nomura, Masaaki Hiramatsu, Yasuhisa Mori, Takashi Yoshimaru, Kazuaki Aoyama, Tomomu Ishikawa, Yo Miyamoto
  • Patent number: 6884670
    Abstract: A method of manufacturing a semiconductor device having an insulated gate type field effect transistor. A gate insulating film, a gate electrode layer having a predetermined area and facing the semiconductor substrate with the gate insulating film being interposed therebetween, an interlayer insulating film, and a wiring layer connected to the gate electrode layer, are formed on a semiconductor substrate in the order recited. A conductive material layer and a resist layer are formed on the wiring layer. The resist layer is patterned to form a resist mask forming a wiring pattern having an antenna ratio of about ten times or more of the predetermined area of the gate electrode layer. At least the conductive material layer is plasma-etched by using the resist mask as an etching mask, and thereafter, the resist mask is removed and the wiring layer is plasma-etched.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: April 26, 2005
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited
    Inventors: Koichi Hashimoto, Daisuke Matsunaga, Masaaki Aoyama
  • Patent number: 6713492
    Abstract: Drugs or reagents containing as the active ingredient N-acyloxylated cycloalkyl compounds represented by general formula (I): wherein A is optionally substituted C4 or C5 cycloalkyl which may have one double bond in the ring; and R is C1-C3 alkyl or phenyl). The above compounds are hydroxyamine derivatives functioning as spin trapping agents and can rapidly react with free radicals or active oxygen in an objective organ in spite of their being excellent in stability during the preparation or administration thereof.
    Type: Grant
    Filed: May 24, 2001
    Date of Patent: March 30, 2004
    Assignees: Daiichi Radioisotope Laboratories, Ltd., Yamagata Public Corporation for the Development of Industry
    Inventors: Osamu Itoh, Heitaro Obara, Hidekatsu Yokoyama, Masaaki Aoyama
  • Patent number: 6707528
    Abstract: An exposure apparatus is made so as to have respective chambers in which a main exposure system, a substrate carrying system, and a mask carrying system are housed. The apparatus is structured so that the respective environments in the chambers are substantially independently maintained from each other. Substrate processing can be facilitated by incorporating photoelectric detection of the substrate center in association with handing-over of the substrate from one substrate carrying member to another, and/or storage of a cleaning substrate in a storage member which also holds substrates being processed by the apparatus.
    Type: Grant
    Filed: July 6, 1999
    Date of Patent: March 16, 2004
    Assignee: Nikon Corporation
    Inventors: Masaaki Aoyama, Hiroyasu Fujita
  • Patent number: 6697145
    Abstract: A compact substrate processing apparatus which is designed so that the number of transfer shafts is reduced, and the time required to exchange wafers is reduced, and further a pre-alignment device provided in an aligner (exposure system) is simplified, or the need for such a pre-alignment device is eliminated, thereby enabling an improvement of the throughput in production of semiconductor or other micro devices. A wafer is taken out from a cassette by a transfer arm. The transfer arm is moved along a slider body to transfer the wafer to a photoresist coating unit. After coating of a photoresist, the wafer is subjected to positioning with regard to the center and the rotation angle in a positioning unit. With the pre-aligned conditions thereof maintained, the wafer is loaded onto a wafer holder of a projection aligner through the transfer arm. After exposure, the wafer holder is moved in the direction +X, and the wafer is unloaded by a transfer arm which belongs to a developer.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: February 24, 2004
    Assignee: Nikon Corporation
    Inventor: Masaaki Aoyama
  • Patent number: 6559485
    Abstract: A transistor 28a including a first gate electrode 26 is formed on a substrate 10 through a gate insulation film 24. An insulation film 30 is formed on the transistor 28a and the substrate 10. A plurality of first wirings 40a, 40b are formed on the insulation film 30, spaced from each other by a first gap d1. A second wiring 42 is formed, spaced from either of the first wiring 40a, 40b by a second gap d2 which is substantially equal to the first gap d1. Either of the first wirings 40a, 40b is electrically connected to the first gate electrode 26, and the second wiring 42 is electrically connected to the substrate 10.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: May 6, 2003
    Assignee: Fujitsu Limited
    Inventor: Masaaki Aoyama
  • Publication number: 20020094625
    Abstract: A method of manufacturing a semiconductor device having an insulated gate type field effect transistor. A gate insulating film, a gate electrode layer having a predetermined area and facing the semiconductor substrate with the gate insulating film being interposed therebetween, an interlayer insulating film, and a wiring layer connected to the gate electrode layer, are formed on a semiconductor substrate in the order recited. A conductive material layer and a resist layer are formed on the wiring layer. The resist layer is patterned to form a resist mask forming a wiring pattern having an antenna ratio of about ten times or more of the predetermined area of the gate electrode layer. At least the conductive material layer is plasma-etched by using the resist mask as an etching mask, and thereafter, the resist mask is removed and the wiring layer is plasma-etched.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 18, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Koichi Hashimoto, Daisuke Matsunaga, Masaaki Aoyama
  • Patent number: 6376388
    Abstract: A method of manufacturing a semiconductor device having an insulated gate type field effect transistor. A gate insulating film, a gate electrode layer having a predetermined area and facing the semiconductor substrate with the gate insulating film being interposed therebetween, an interlayer insulating film, and a wiring layer connected to the gate electrode layer, are formed on a semiconductor substrate in the order recited. A conductive material layer and a resist layer are formed on the wiring layer. The resist layer is patterned to form a resist mask forming a wiring pattern having an antenna ratio of about ten times or more of the predetermined area of the gate electrode layer. At least the conductive material layer is plasma-etched by using the resist mask as an etching mask, and thereafter, the resist mask is removed and the wiring layer is plasma-etched.
    Type: Grant
    Filed: January 22, 1997
    Date of Patent: April 23, 2002
    Assignee: Fujitsu Limited
    Inventors: Koichi Hashimoto, Daisuke Matsunaga, Masaaki Aoyama
  • Publication number: 20020000579
    Abstract: A transistor 28a including a first gate electrode 26 is formed on a substrate 10 through a gate insulation film 24. An insulation film 30 is formed on the transistor 28a and the substrate 10. A plurality of first wirings 40a, 40b are formed on the insulation film 30, spaced from each other by a first gap d1. A second wiring 42 is formed, spaced from either of the first wiring 40a, 40b by a second gap d2 which is substantially equal to the first gap d1. Either of the first wirings 40a, 40b is electrically connected to the first gate electrode 26, and the second wiring 42 is electrically connected to the substrate 10.
    Type: Application
    Filed: March 24, 2000
    Publication date: January 3, 2002
    Applicant: FUJITSU LIMITED
    Inventor: Masaaki Aoyama
  • Patent number: 6044850
    Abstract: Ashing process of a resist pattern used in a semiconductor device manufacturing method is conducted by exposing the resist, the wirings, and their peripheral regions to a first atmosphere which includes a first product obtained by plasmanizing a gas containing water at a rate of more than 30 flow rate %, and placing the resist in a second atmosphere which includes a second product obtained by plasmanizing an oxygen mixed gas which contains an oxygen gas as a principal component before or after or before and after the exposing step.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: April 4, 2000
    Assignee: Fujitsu Limited
    Inventors: Soichiro Ozawa, Satoru Mihara, Kunihiko Nagase, Masaaki Aoyama, Naoki Nishida
  • Patent number: 5837334
    Abstract: A quartz glass tube, produced by mechanically processing a natural/synthetic quartz glass mother material, having 50-300 mm.phi. in outer diameter, from. 1 to 7 in outer to inner diameter ratio, 10 mm or more in thickness and 2% or less in thickness error; a large-scale quartz glass preform integrally combining the large-sized quartz glass tube with a core glass rod for an optical fiber using a rod-in-tube technique; and a method for manufacturing a large-scale quartz glass preform performing the mechanical processing with a high precision machine, i.e., integrating a core rod for an optical fiber under a rod in process with a quartz glass tube, a tube diameter of which is controlled by heating, hot drawing or hot drawing with pressure by using a tool-free drawing method.
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: November 17, 1998
    Assignees: Heraeus Quarzglas GmbH, Shin-ETSU Quartz Products Col, Ltd.
    Inventors: Kiyoshi Yokokawa, Masaaki Aoyama, Gerhart Vilsmeier
  • Patent number: 5785729
    Abstract: A method for fabricating a large-sized primary treated quartz glass tube by perforating a cylindrical quartz glass mother material by a hot carbon drill press-in-process followed by etching and washing. The large-sized primary treated quartz glass tube is converted to a large-sized quartz glass preform by combining it with a core glass rod for an optical fiber. Another embodiment is a method for fabricating a large-sized quartz glass tube by heating, hot drawing or hot drawing under pressure using a tool-free drawing method under control of an inside pressure of the large-sized primary treated quartz glass tube at a temperature ranging from 1600.degree. C. to 3000.degree. C. to satisfy a specific equation.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: July 28, 1998
    Assignees: Heraeus Quarzglas GmbH, Shin-Etsu Quartz Products Co., Ltd
    Inventors: Kiyoshi Yokokawa, Masaaki Aoyama, Gerhart Vilsmeier
  • Patent number: 5780257
    Abstract: Method for detecting peroxidase or hydrogen peroxide with high sensitivity. Both peroxidase and hydrogen peroxide are prepared such that one of them is overabundant to the other. Phenoxy radicals are produced from a p-substituted phenol compound by the action of peroxidase in the presence of hydrogen peroxide. The free radicals are trapped by a hydroxy amine compound, and stable radical species are produced. Electron spin resonances of the stable radical species are measured.
    Type: Grant
    Filed: July 18, 1996
    Date of Patent: July 14, 1998
    Assignees: Yamagata Technopolis Foundation, JEOL Ltd.
    Inventors: Masaaki Aoyama, Masanobu Shiga
  • Patent number: 5651827
    Abstract: A reactor vessel includes a quartz glass body having sidewalls and a ceiling formed as a single unit without welds. Translucent or opaque portions are formed by bubbles in the glass where heat insulation is desired and transparent portions are formed by absence of bubbles where heat transmission and visibility are desired. The body is formed by adding quartz glass powder to a mold which is rotated about a central axis so that centrifugal force causes a layer of powder to form on the inside of the mold. The layer is then heated until it melts.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: July 29, 1997
    Assignees: Heraeus Quarzglas GmbH, Shin-Etsu Quartz Products Co., Ltd.
    Inventors: Masaaki Aoyama, Hiroyuki Miyazawa
  • Patent number: 5559582
    Abstract: An exposure apparatus includes a cleaning tool which is located at a position where it is brought into contact with the entire surface of a wafer holder when a wafer stage moves within a predetermined driving range, and a vertical driving shaft for biasing the cleaning tool against the wafer holder. While the cleaning tool is biased against the wafer holder, the wafer stage is moved within the predetermined driving range, thereby cleaning the wafer holder.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: September 24, 1996
    Assignee: Nikon Corporation
    Inventors: Kenji Nishi, Masaaki Aoyama
  • Patent number: 5452119
    Abstract: The laser beam emitted by a laser light source is first brought to an image in an auxiliary scanning plane, and reflected by a slit mirror provided in a prism block. The arrangement is such that this laser light is incident on the scanning deflector along the optic axis of the scanning lens, and a screen is provided for obstructing ghosting in the vicinity of the scanning surface. Further, either the side of the prism block on which the light is incident or the side from which it emerges is curved, or both are curved, or one side of the prism block is treated to prevent reflection. Further, a screen is provided between the laser light source and the slit mirror so as to obstruct that part of the light incident on the mirror which is reflected by the mirror after being reflected by the scanning deflector.
    Type: Grant
    Filed: October 26, 1993
    Date of Patent: September 19, 1995
    Assignee: Asahi Kogaku Kogyo Kabushiki Kaisha
    Inventors: Akira Morimoto, Masaaki Aoyama
  • Patent number: 5324012
    Abstract: A holder which cleanly holds an article such as a semiconductor wafer and which is high in rigidity, light in weight, high in dimensional stability and excellent in dust resistance. The wafer holder includes a vacuum holding surface formed with a plurality of concentric or helical annular projections and annular vacuum holding grooves which are arranged at a given pitch. A plurality of vacuum holes for vacuum holding purposes are formed in the respective annular grooves so as to be arranged radially and each of the vacuum holes is subjected to pressure reduction by a vacuum source through the interior of the holder, thereby correcting the flatness of a wafer to conform with the upper surfaces of the annular projections. At least the portions of the holder which contact with the wafer (preferably the holder on the whole) are made of a sintered ceramic containing covalent bond-type conductive material such as a TiC-containing sintered Al.sub.2 O.sub.
    Type: Grant
    Filed: July 6, 1992
    Date of Patent: June 28, 1994
    Assignee: Nikon Corporation
    Inventors: Masaaki Aoyama, Keiichi Kimura
  • Patent number: 5299050
    Abstract: A scanning optical system for preventing ghosting is provided wherein a laser beam emitted by a laser light source is first brought to an image in an auxiliary scanning plane, and reflected by a slit mirror provided in a prism block. The laser beam is incident on the scanning deflector along the optical axis of the scanning lens, and a screen is provided for obstructing ghosting in the vicinity of the scanning surface. Further, at least one side of the prism block on which the light is incident from which the light emerges is curved, or one side of the prism block is treated to prevent reflection. Further, the screen is disposed between the laser light source and the slit mirror so as to obstruct the part of the light beam incident on the mirror which is reflected by the mirror after being reflected by the scanning deflector.
    Type: Grant
    Filed: January 16, 1992
    Date of Patent: March 29, 1994
    Assignee: Asahi Kogaku Kogyo Kabushiki Kaisha
    Inventors: Akira Morimoto, Masaaki Aoyama
  • Patent number: 5218461
    Abstract: A scanning optical apparatus has a laser beam source for emitting a laser beam, a scanning deflector for deflecting and scanning the laser beam in a principal scanning plane, a scanning lens for imaging the deflected laser beam on a scanning surface to form a spot thereon, an imaging lens for forming the laser beam from the laser beam source into a line spread function image in an auxiliary scanning plane that is perpendicular to the principal scanning plane before the laser beam is made incident to the scanning deflector, a static deflector which is located on the line spread function image and which is adapted to guide the beam from the light source to the scanning deflector and guide the reflected beam from the scanning deflector to the scanning lens, and a holding member for holding at least the laser beam source, the imaging lens and the static deflector separately from other optical elements.
    Type: Grant
    Filed: September 14, 1990
    Date of Patent: June 8, 1993
    Assignee: Asahi Kogaku Kogyo Kabushiki Kaisha
    Inventors: Masaaki Aoyama, Akira Morimoto
  • Patent number: 5194743
    Abstract: A device for positioning a circular substrate having a cut portion, comprising: a first rotational stage which is finely rotated around the origin of a rectangular coordinate system; an X-Y stage on the first rotational stage which is two-dimensionally moved in the coordinate system; a second rotational stage on the X-Y stage which is rotated while holding the substrate; a first detecting device for detecting information about the displacement change of the periphery of the substrate from the rotational center during the rotation of the second rotational stage; a first positioning controlling device for controlling the rotation of the second rotational stage in accordance with information detected by the first detecting device so that the cut portion is placed in a predetermined direction on the coordinate system; a second detecting device having three or more detecting points in the coordinate system so as to detect the three or more positions of the periphery, the second detecting device generating informat
    Type: Grant
    Filed: April 2, 1991
    Date of Patent: March 16, 1993
    Assignee: Nikon Corporation
    Inventors: Masaaki Aoyama, Naomasa Shiraishi, Ken Hattori, Atsushi Yamaguchi, Kesayoshi Amano